4 * Serial port driver interface
6 * This file is part of the MinGW package.
9 * Created by Casper S. Hornstrup <chorns@users.sourceforge.net>
11 * THIS SOFTWARE IS NOT COPYRIGHTED
13 * This source code is offered for use in the public domain. You may
14 * use, modify or distribute it freely.
16 * This code is distributed in the hope that it will be useful but
17 * WITHOUT ANY WARRANTY. ALL WARRANTIES, EXPRESS OR IMPLIED ARE HEREBY
18 * DISCLAMED. This includes but is not limited to warranties of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
27 #pragma GCC system_header
42 DEFINE_GUID(GUID_DEVINTERFACE_COMPORT,
43 0x86e0d1e0L, 0x8089, 0x11d0, 0x9c, 0xe4, 0x08, 0x00, 0x3e, 0x30, 0x1f, 0x73);
44 DEFINE_GUID(GUID_DEVINTERFACE_SERENUM_BUS_ENUMERATOR,
45 0x4D36E978L, 0xE325, 0x11CE, 0xBF, 0xC1, 0x08, 0x00, 0x2B, 0xE1, 0x03, 0x18);
48 #define IOCTL_SERIAL_CLEAR_STATS \
49 CTL_CODE (FILE_DEVICE_SERIAL_PORT, 36, METHOD_BUFFERED, FILE_ANY_ACCESS)
50 #define IOCTL_SERIAL_CLR_DTR \
51 CTL_CODE (FILE_DEVICE_SERIAL_PORT, 10, METHOD_BUFFERED, FILE_ANY_ACCESS)
52 #define IOCTL_SERIAL_CLR_RTS \
53 CTL_CODE (FILE_DEVICE_SERIAL_PORT, 13, METHOD_BUFFERED, FILE_ANY_ACCESS)
54 #define IOCTL_SERIAL_CONFIG_SIZE \
55 CTL_CODE (FILE_DEVICE_SERIAL_PORT, 32, METHOD_BUFFERED, FILE_ANY_ACCESS)
56 #define IOCTL_SERIAL_GET_BAUD_RATE \
57 CTL_CODE (FILE_DEVICE_SERIAL_PORT, 20, METHOD_BUFFERED, FILE_ANY_ACCESS)
58 #define IOCTL_SERIAL_GET_CHARS \
59 CTL_CODE (FILE_DEVICE_SERIAL_PORT, 22, METHOD_BUFFERED, FILE_ANY_ACCESS)
60 #define IOCTL_SERIAL_GET_COMMSTATUS \
61 CTL_CODE (FILE_DEVICE_SERIAL_PORT, 27, METHOD_BUFFERED, FILE_ANY_ACCESS)
62 #define IOCTL_SERIAL_GET_DTRRTS \
63 CTL_CODE (FILE_DEVICE_SERIAL_PORT, 30, METHOD_BUFFERED, FILE_ANY_ACCESS)
64 #define IOCTL_SERIAL_GET_HANDFLOW \
65 CTL_CODE (FILE_DEVICE_SERIAL_PORT, 24, METHOD_BUFFERED, FILE_ANY_ACCESS)
66 #define IOCTL_SERIAL_GET_LINE_CONTROL \
67 CTL_CODE (FILE_DEVICE_SERIAL_PORT, 21, METHOD_BUFFERED, FILE_ANY_ACCESS)
68 #define IOCTL_SERIAL_GET_MODEM_CONTROL \
69 CTL_CODE (FILE_DEVICE_SERIAL_PORT, 37, METHOD_BUFFERED, FILE_ANY_ACCESS)
70 #define IOCTL_SERIAL_GET_MODEMSTATUS \
71 CTL_CODE (FILE_DEVICE_SERIAL_PORT, 26, METHOD_BUFFERED, FILE_ANY_ACCESS)
72 #define IOCTL_SERIAL_GET_PROPERTIES \
73 CTL_CODE (FILE_DEVICE_SERIAL_PORT, 29, METHOD_BUFFERED, FILE_ANY_ACCESS)
74 #define IOCTL_SERIAL_GET_STATS \
75 CTL_CODE (FILE_DEVICE_SERIAL_PORT, 35, METHOD_BUFFERED, FILE_ANY_ACCESS)
76 #define IOCTL_SERIAL_GET_TIMEOUTS \
77 CTL_CODE (FILE_DEVICE_SERIAL_PORT, 8, METHOD_BUFFERED, FILE_ANY_ACCESS)
78 #define IOCTL_SERIAL_GET_WAIT_MASK \
79 CTL_CODE (FILE_DEVICE_SERIAL_PORT, 16, METHOD_BUFFERED, FILE_ANY_ACCESS)
80 #define IOCTL_SERIAL_IMMEDIATE_CHAR \
81 CTL_CODE (FILE_DEVICE_SERIAL_PORT, 6, METHOD_BUFFERED, FILE_ANY_ACCESS)
82 #define IOCTL_SERIAL_LSRMST_INSERT \
83 CTL_CODE (FILE_DEVICE_SERIAL_PORT, 31, METHOD_BUFFERED, FILE_ANY_ACCESS)
84 #define IOCTL_SERIAL_PURGE \
85 CTL_CODE (FILE_DEVICE_SERIAL_PORT, 19, METHOD_BUFFERED, FILE_ANY_ACCESS)
86 #define IOCTL_SERIAL_RESET_DEVICE \
87 CTL_CODE (FILE_DEVICE_SERIAL_PORT, 11, METHOD_BUFFERED, FILE_ANY_ACCESS)
88 #define IOCTL_SERIAL_SET_BAUD_RATE \
89 CTL_CODE (FILE_DEVICE_SERIAL_PORT, 1, METHOD_BUFFERED, FILE_ANY_ACCESS)
90 #define IOCTL_SERIAL_SET_BREAK_ON \
91 CTL_CODE (FILE_DEVICE_SERIAL_PORT, 4, METHOD_BUFFERED, FILE_ANY_ACCESS)
92 #define IOCTL_SERIAL_SET_BREAK_OFF \
93 CTL_CODE (FILE_DEVICE_SERIAL_PORT, 5, METHOD_BUFFERED, FILE_ANY_ACCESS)
94 #define IOCTL_SERIAL_SET_CHARS \
95 CTL_CODE (FILE_DEVICE_SERIAL_PORT, 23, METHOD_BUFFERED, FILE_ANY_ACCESS)
96 #define IOCTL_SERIAL_SET_DTR \
97 CTL_CODE (FILE_DEVICE_SERIAL_PORT, 9, METHOD_BUFFERED, FILE_ANY_ACCESS)
98 #define IOCTL_SERIAL_SET_FIFO_CONTROL \
99 CTL_CODE (FILE_DEVICE_SERIAL_PORT, 39, METHOD_BUFFERED, FILE_ANY_ACCESS)
100 #define IOCTL_SERIAL_SET_HANDFLOW \
101 CTL_CODE (FILE_DEVICE_SERIAL_PORT, 25, METHOD_BUFFERED, FILE_ANY_ACCESS)
102 #define IOCTL_SERIAL_SET_LINE_CONTROL \
103 CTL_CODE (FILE_DEVICE_SERIAL_PORT, 3, METHOD_BUFFERED, FILE_ANY_ACCESS)
104 #define IOCTL_SERIAL_SET_MODEM_CONTROL \
105 CTL_CODE (FILE_DEVICE_SERIAL_PORT, 38, METHOD_BUFFERED, FILE_ANY_ACCESS)
106 #define IOCTL_SERIAL_SET_QUEUE_SIZE \
107 CTL_CODE (FILE_DEVICE_SERIAL_PORT, 2, METHOD_BUFFERED, FILE_ANY_ACCESS)
108 #define IOCTL_SERIAL_SET_RTS \
109 CTL_CODE (FILE_DEVICE_SERIAL_PORT, 12, METHOD_BUFFERED, FILE_ANY_ACCESS)
110 #define IOCTL_SERIAL_SET_TIMEOUTS \
111 CTL_CODE (FILE_DEVICE_SERIAL_PORT, 7, METHOD_BUFFERED, FILE_ANY_ACCESS)
112 #define IOCTL_SERIAL_SET_WAIT_MASK \
113 CTL_CODE (FILE_DEVICE_SERIAL_PORT, 17, METHOD_BUFFERED, FILE_ANY_ACCESS)
114 #define IOCTL_SERIAL_SET_XOFF \
115 CTL_CODE (FILE_DEVICE_SERIAL_PORT, 14, METHOD_BUFFERED, FILE_ANY_ACCESS)
116 #define IOCTL_SERIAL_SET_XON \
117 CTL_CODE (FILE_DEVICE_SERIAL_PORT, 15, METHOD_BUFFERED, FILE_ANY_ACCESS)
118 #define IOCTL_SERIAL_WAIT_ON_MASK \
119 CTL_CODE (FILE_DEVICE_SERIAL_PORT, 18, METHOD_BUFFERED, FILE_ANY_ACCESS)
120 #define IOCTL_SERIAL_XOFF_COUNTER \
121 CTL_CODE (FILE_DEVICE_SERIAL_PORT, 28, METHOD_BUFFERED, FILE_ANY_ACCESS)
123 #define IOCTL_SERIAL_INTERNAL_BASIC_SETTINGS \
124 CTL_CODE (FILE_DEVICE_SERIAL_PORT, 3, METHOD_BUFFERED, FILE_ANY_ACCESS)
125 #define IOCTL_SERIAL_INTERNAL_CANCEL_WAIT_WAKE \
126 CTL_CODE (FILE_DEVICE_SERIAL_PORT, 2, METHOD_BUFFERED, FILE_ANY_ACCESS)
127 #define IOCTL_SERIAL_INTERNAL_DO_WAIT_WAKE \
128 CTL_CODE (FILE_DEVICE_SERIAL_PORT, 1, METHOD_BUFFERED, FILE_ANY_ACCESS)
129 #define IOCTL_SERIAL_INTERNAL_RESTORE_SETTINGS \
130 CTL_CODE (FILE_DEVICE_SERIAL_PORT, 4, METHOD_BUFFERED, FILE_ANY_ACCESS)
132 #define IOCTL_SERENUM_PORT_DESC \
133 CTL_CODE (FILE_DEVICE_SERENUM, 130, METHOD_BUFFERED, FILE_ANY_ACCESS)
134 #define IOCTL_SERENUM_GET_PORT_NAME \
135 CTL_CODE (FILE_DEVICE_SERENUM, 131, METHOD_BUFFERED, FILE_ANY_ACCESS)
137 #define IOCTL_INTERNAL_SERENUM_REMOVE_SELF \
138 CTL_CODE (FILE_DEVICE_SERENUM, 129, METHOD_NEITHER, FILE_ANY_ACCESS)
141 typedef struct _SERIAL_BAUD_RATE {
143 } SERIAL_BAUD_RATE, *PSERIAL_BAUD_RATE;
145 /* SERIAL_BAUD_RATE.BaudRate constants */
146 #define SERIAL_BAUD_075 0x00000001
147 #define SERIAL_BAUD_110 0x00000002
148 #define SERIAL_BAUD_134_5 0x00000004
149 #define SERIAL_BAUD_150 0x00000008
150 #define SERIAL_BAUD_300 0x00000010
151 #define SERIAL_BAUD_600 0x00000020
152 #define SERIAL_BAUD_1200 0x00000040
153 #define SERIAL_BAUD_1800 0x00000080
154 #define SERIAL_BAUD_2400 0x00000100
155 #define SERIAL_BAUD_4800 0x00000200
156 #define SERIAL_BAUD_7200 0x00000400
157 #define SERIAL_BAUD_9600 0x00000800
158 #define SERIAL_BAUD_14400 0x00001000
159 #define SERIAL_BAUD_19200 0x00002000
160 #define SERIAL_BAUD_38400 0x00004000
161 #define SERIAL_BAUD_56K 0x00008000
162 #define SERIAL_BAUD_128K 0x00010000
163 #define SERIAL_BAUD_115200 0x00020000
164 #define SERIAL_BAUD_57600 0x00040000
165 #define SERIAL_BAUD_USER 0x10000000
167 typedef struct _SERIAL_CHARS {
174 } SERIAL_CHARS, *PSERIAL_CHARS;
176 typedef struct _SERIAL_STATUS {
179 ULONG AmountInInQueue;
180 ULONG AmountInOutQueue;
182 BOOLEAN WaitForImmediate;
183 } SERIAL_STATUS, *PSERIAL_STATUS;
185 typedef struct _SERIAL_HANDFLOW {
186 ULONG ControlHandShake;
190 } SERIAL_HANDFLOW, *PSERIAL_HANDFLOW;
192 #define SERIAL_DTR_MASK 0x00000003
193 #define SERIAL_DTR_CONTROL 0x00000001
194 #define SERIAL_DTR_HANDSHAKE 0x00000002
195 #define SERIAL_CTS_HANDSHAKE 0x00000008
196 #define SERIAL_DSR_HANDSHAKE 0x00000010
197 #define SERIAL_DCD_HANDSHAKE 0x00000020
198 #define SERIAL_OUT_HANDSHAKEMASK 0x00000038
199 #define SERIAL_DSR_SENSITIVITY 0x00000040
200 #define SERIAL_ERROR_ABORT 0x80000000
201 #define SERIAL_CONTROL_INVALID 0x7fffff84
202 #define SERIAL_AUTO_TRANSMIT 0x00000001
203 #define SERIAL_AUTO_RECEIVE 0x00000002
204 #define SERIAL_ERROR_CHAR 0x00000004
205 #define SERIAL_NULL_STRIPPING 0x00000008
206 #define SERIAL_BREAK_CHAR 0x00000010
207 #define SERIAL_RTS_MASK 0x000000c0
208 #define SERIAL_RTS_CONTROL 0x00000040
209 #define SERIAL_RTS_HANDSHAKE 0x00000080
210 #define SERIAL_TRANSMIT_TOGGLE 0x000000c0
211 #define SERIAL_XOFF_CONTINUE 0x80000000
212 #define SERIAL_FLOW_INVALID 0x7fffff20
214 typedef struct _SERIAL_LINE_CONTROL {
218 } SERIAL_LINE_CONTROL, *PSERIAL_LINE_CONTROL;
220 /* SERIAL_LINE_CONTROL.StopBits constants */
221 #define STOP_BIT_1 0x00
222 #define STOP_BITS_1_5 0x01
223 #define STOP_BITS_2 0x02
225 /* SERIAL_LINE_CONTROL.Parity constants */
226 #define NO_PARITY 0x00
227 #define ODD_PARITY 0x01
228 #define EVEN_PARITY 0x02
229 #define MARK_PARITY 0x03
230 #define SPACE_PARITY 0x04
232 /* IOCTL_SERIAL_(GET_MODEM_CONTROL, SET_MODEM_CONTROL) flags */
233 #define SERIAL_IOC_MCR_DTR 0x00000001
234 #define SERIAL_IOC_MCR_RTS 0x00000002
235 #define SERIAL_IOC_MCR_OUT1 0x00000004
236 #define SERIAL_IOC_MCR_OUT2 0x00000008
237 #define SERIAL_IOC_MCR_LOOP 0x00000010
239 typedef struct _SERIAL_COMMPROP {
241 USHORT PacketVersion;
248 ULONG ProvCapabilities;
249 ULONG SettableParams;
252 USHORT SettableStopParity;
253 ULONG CurrentTxQueue;
254 ULONG CurrentRxQueue;
258 } SERIAL_COMMPROP, *PSERIAL_COMMPROP;
260 /* SERIAL_COMMPROP.SettableParams flags */
261 #define SERIAL_SP_PARITY 0x0001
262 #define SERIAL_SP_BAUD 0x0002
263 #define SERIAL_SP_DATABITS 0x0004
264 #define SERIAL_SP_STOPBITS 0x0008
265 #define SERIAL_SP_HANDSHAKING 0x0010
266 #define SERIAL_SP_PARITY_CHECK 0x0020
267 #define SERIAL_SP_CARRIER_DETECT 0x0040
269 /* SERIAL_COMMPROP.ProvCapabilities flags */
270 #define SERIAL_PCF_DTRDSR 0x00000001
271 #define SERIAL_PCF_RTSCTS 0x00000002
272 #define SERIAL_PCF_CD 0x00000004
273 #define SERIAL_PCF_PARITY_CHECK 0x00000008
274 #define SERIAL_PCF_XONXOFF 0x00000010
275 #define SERIAL_PCF_SETXCHAR 0x00000020
276 #define SERIAL_PCF_TOTALTIMEOUTS 0x00000040
277 #define SERIAL_PCF_INTTIMEOUTS 0x00000080
278 #define SERIAL_PCF_SPECIALCHARS 0x00000100
279 #define SERIAL_PCF_16BITMODE 0x00000200
281 /* SERIAL_COMMPROP.SettableData flags */
282 #define SERIAL_DATABITS_5 0x0001
283 #define SERIAL_DATABITS_6 0x0002
284 #define SERIAL_DATABITS_7 0x0004
285 #define SERIAL_DATABITS_8 0x0008
286 #define SERIAL_DATABITS_16 0x0010
287 #define SERIAL_DATABITS_16X 0x0020
289 /* SERIAL_COMMPROP.SettableStopParity flags */
290 #define SERIAL_STOPBITS_10 0x0001
291 #define SERIAL_STOPBITS_15 0x0002
292 #define SERIAL_STOPBITS_20 0x0004
293 #define SERIAL_PARITY_NONE 0x0100
294 #define SERIAL_PARITY_ODD 0x0200
295 #define SERIAL_PARITY_EVEN 0x0400
296 #define SERIAL_PARITY_MARK 0x0800
297 #define SERIAL_PARITY_SPACE 0x1000
299 typedef struct _SERIALPERF_STATS {
301 ULONG TransmittedCount;
302 ULONG FrameErrorCount;
303 ULONG SerialOverrunErrorCount;
304 ULONG BufferOverrunErrorCount;
305 ULONG ParityErrorCount;
306 } SERIALPERF_STATS, *PSERIALPERF_STATS;
308 typedef struct _SERIAL_TIMEOUTS {
309 ULONG ReadIntervalTimeout;
310 ULONG ReadTotalTimeoutMultiplier;
311 ULONG ReadTotalTimeoutConstant;
312 ULONG WriteTotalTimeoutMultiplier;
313 ULONG WriteTotalTimeoutConstant;
314 } SERIAL_TIMEOUTS, *PSERIAL_TIMEOUTS;
316 /* IOCTL_SERIAL_(GET_WAIT_MASK, SET_WAIT_MASK, WAIT_ON_MASK) flags */
317 #define SERIAL_EV_RXCHAR 0x0001
318 #define SERIAL_EV_RXFLAG 0x0002
319 #define SERIAL_EV_TXEMPTY 0x0004
320 #define SERIAL_EV_CTS 0x0008
321 #define SERIAL_EV_DSR 0x0010
322 #define SERIAL_EV_RLSD 0x0020
323 #define SERIAL_EV_BREAK 0x0040
324 #define SERIAL_EV_ERR 0x0080
325 #define SERIAL_EV_RING 0x0100
326 #define SERIAL_EV_PERR 0x0200
327 #define SERIAL_EV_RX80FULL 0x0400
328 #define SERIAL_EV_EVENT1 0x0800
329 #define SERIAL_EV_EVENT2 0x1000
331 /* IOCTL_SERIAL_LSRMST_INSERT constants */
332 #define SERIAL_LSRMST_LSR_DATA 0x01
333 #define SERIAL_LSRMST_LSR_NODATA 0x02
334 #define SERIAL_LSRMST_MST 0x03
335 #define SERIAL_LSRMST_ESCAPE 0x00
337 /* IOCTL_SERIAL_PURGE constants */
338 #define SERIAL_PURGE_TXABORT 0x00000001
339 #define SERIAL_PURGE_RXABORT 0x00000002
340 #define SERIAL_PURGE_TXCLEAR 0x00000004
341 #define SERIAL_PURGE_RXCLEAR 0x00000008
343 /* IOCTL_SERIAL_SET_FIFO_CONTROL constants */
344 #define SERIAL_IOC_FCR_FIFO_ENABLE 0x00000001
345 #define SERIAL_IOC_FCR_RCVR_RESET 0x00000002
346 #define SERIAL_IOC_FCR_XMIT_RESET 0x00000004
347 #define SERIAL_IOC_FCR_DMA_MODE 0x00000008
348 #define SERIAL_IOC_FCR_RES1 0x00000010
349 #define SERIAL_IOC_FCR_RES2 0x00000020
350 #define SERIAL_IOC_FCR_RCVR_TRIGGER_LSB 0x00000040
351 #define SERIAL_IOC_FCR_RCVR_TRIGGER_MSB 0x00000080
353 typedef struct _SERIAL_QUEUE_SIZE {
356 } SERIAL_QUEUE_SIZE, *PSERIAL_QUEUE_SIZE;
358 typedef struct _SERIAL_XOFF_COUNTER {
362 } SERIAL_XOFF_COUNTER, *PSERIAL_XOFF_COUNTER;
364 typedef struct _SERIAL_BASIC_SETTINGS {
365 SERIAL_TIMEOUTS Timeouts;
366 SERIAL_HANDFLOW HandFlow;
369 } SERIAL_BASIC_SETTINGS, *PSERIAL_BASIC_SETTINGS;
371 typedef struct _SERENUM_PORT_DESC {
374 PHYSICAL_ADDRESS PortAddress;
376 } SERENUM_PORT_DESC, *PSERENUM_PORT_DESC;
378 typedef UCHAR STDCALL
379 (*PSERENUM_READPORT)(
380 PVOID SerPortAddress);
383 (*PSERENUM_WRITEPORT)(
384 PVOID SerPortAddress,
387 typedef enum _SERENUM_PORTION {
393 typedef struct _SERENUM_PORT_PARAMETERS {
395 PSERENUM_READPORT ReadAccessor;
396 PSERENUM_WRITEPORT WriteAccessor;
397 PVOID SerPortAddress;
398 PVOID HardwareHandle;
399 SERENUM_PORTION Portion;
402 } SERENUM_PORT_PARAMETERS, *PSERENUM_PORT_PARAMETERS;
404 #define SERIAL_ERROR_BREAK 0x00000001
405 #define SERIAL_ERROR_FRAMING 0x00000002
406 #define SERIAL_ERROR_OVERRUN 0x00000004
407 #define SERIAL_ERROR_QUEUEOVERRUN 0x00000008
408 #define SERIAL_ERROR_PARITY 0x00000010
410 #define SERIAL_SP_UNSPECIFIED 0x00000000
411 #define SERIAL_SP_RS232 0x00000001
412 #define SERIAL_SP_PARALLEL 0x00000002
413 #define SERIAL_SP_RS422 0x00000003
414 #define SERIAL_SP_RS423 0x00000004
415 #define SERIAL_SP_RS449 0x00000005
416 #define SERIAL_SP_MODEM 0X00000006
417 #define SERIAL_SP_FAX 0x00000021
418 #define SERIAL_SP_SCANNER 0x00000022
419 #define SERIAL_SP_BRIDGE 0x00000100
420 #define SERIAL_SP_LAT 0x00000101
421 #define SERIAL_SP_TELNET 0x00000102
422 #define SERIAL_SP_X25 0x00000103
423 #define SERIAL_SP_SERIALCOMM 0x00000001
425 #define SERIAL_TX_WAITING_FOR_CTS 0x00000001
426 #define SERIAL_TX_WAITING_FOR_DSR 0x00000002
427 #define SERIAL_TX_WAITING_FOR_DCD 0x00000004
428 #define SERIAL_TX_WAITING_FOR_XON 0x00000008
429 #define SERIAL_TX_WAITING_XOFF_SENT 0x00000010
430 #define SERIAL_TX_WAITING_ON_BREAK 0x00000020
431 #define SERIAL_RX_WAITING_FOR_DSR 0x00000040
433 #define SERIAL_DTR_STATE 0x00000001
434 #define SERIAL_RTS_STATE 0x00000002
435 #define SERIAL_CTS_STATE 0x00000010
436 #define SERIAL_DSR_STATE 0x00000020
437 #define SERIAL_RI_STATE 0x00000040
438 #define SERIAL_DCD_STATE 0x00000080
440 typedef struct _SERIALCONFIG {
446 WCHAR ProviderData[1];
447 } SERIALCONFIG,*PSERIALCONFIG;
455 #endif /* __NTDDSER_H */