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[SPARC] Fix 8 and 16-bit atomic load and store.
authorJames Y Knight <jyknight@google.com>
Mon, 23 May 2016 20:33:00 +0000 (20:33 +0000)
committerJames Y Knight <jyknight@google.com>
Mon, 23 May 2016 20:33:00 +0000 (20:33 +0000)
commitfdcc727da6fa4f9fd9d572d7d5d3a22019fdae93
tree993898787af586e27b62b0d98fd8171e5ee9b6b4tree
parent2280f9325e6993df3d858300b9ab6901a6b78ba4commit | diff
[SPARC] Fix 8 and 16-bit atomic load and store.

They were accidentally using the 32-bit load/store instruction for
8/16-bit operations, due to incorrect patterns

(8/16-bit cmpxchg and atomicrmw will be fixed in subsequent changes)

llvm-svn: 270486
llvm/lib/Target/Sparc/SparcInstr64Bit.td diff | blob | history
llvm/lib/Target/Sparc/SparcInstrInfo.td diff | blob | history
llvm/test/CodeGen/SPARC/atomics.ll diff | blob | history
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