lldb.git
19 months ago[MS] On x86_32, pass overaligned, non-copyable arguments indirectly
Reid Kleckner [Fri, 18 Sep 2020 18:22:15 +0000 (11:22 -0700)]
[MS] On x86_32, pass overaligned, non-copyable arguments indirectly

This updates the C++ ABI argument classification code to use the logic
from D72114, fixing an ABI incompatibility with MSVC.

Part of PR44395.

Differential Revision: https://reviews.llvm.org/D87923

19 months ago[AMDGPU] Adding mutex to guard lld::elf::link interface use
jerryyin [Mon, 21 Sep 2020 18:22:56 +0000 (11:22 -0700)]
[AMDGPU] Adding mutex to guard lld::elf::link interface use

check-mlir target run tests simultaneously with multiple threads. This caused multiple threads to invoke the `lld::elf::link()` interface at the same time. Since the interface does not have a thread-safe implementation, add a metex to prevent multi-threaded access.

I discovered this by looking the the failure stack trace. lld/ELF/symbolTable.cpp, SymbolTable::insert() hit into an assert with related to Epoch Trackers. The root cause is to due to there is no protection around the symMap (update) which is implemented in non-thread safe data structure: denseMap.

Differential Revision: https://reviews.llvm.org/D88038

19 months ago[ObjCARC] Initialize return value
Arthur Eubanks [Mon, 21 Sep 2020 18:02:37 +0000 (11:02 -0700)]
[ObjCARC] Initialize return value

Mistakenly removed initialization of `Changed` in https://reviews.llvm.org/D87806.

19 months ago[AIX][Clang][Driver] Add handling of shared option
David Tenty [Fri, 28 Aug 2020 18:38:59 +0000 (14:38 -0400)]
[AIX][Clang][Driver] Add handling of shared option

Reviewed By: jasonliu

Differential Revision: https://reviews.llvm.org/D87914

19 months ago[SLP] use unary shuffle creator to reduce code duplication; NFC
Sanjay Patel [Mon, 21 Sep 2020 17:45:56 +0000 (13:45 -0400)]
[SLP] use unary shuffle creator to reduce code duplication; NFC

19 months ago[IRBuilder][VectorCombine] make and use a convenience function for unary shuffle...
Sanjay Patel [Mon, 21 Sep 2020 17:27:40 +0000 (13:27 -0400)]
[IRBuilder][VectorCombine] make and use a convenience function for unary shuffle; NFC

This reduces code duplication for common construct.
Follow-ups can use this in SLP, LoopVectorizer, and other passes.

19 months ago[OpenMP] Protect unrecogonized CUDA error code
Ye Luo [Mon, 21 Sep 2020 17:42:54 +0000 (13:42 -0400)]
[OpenMP] Protect unrecogonized CUDA error code

If an error code can not be recognized by cuGetErrorString, errStr remains null and causes crashing at DP() printing.
Protect this case.

Reviewed By: jhuber6, tianshilei1992

Differential Revision: https://reviews.llvm.org/D87980

19 months ago[SCEV] Recognize @llvm.uadd.sat as `%y + umin(%x, (-1 - %y))`
Roman Lebedev [Mon, 21 Sep 2020 16:42:55 +0000 (19:42 +0300)]
[SCEV] Recognize @llvm.uadd.sat as `%y + umin(%x, (-1 - %y))`

----------------------------------------
define i32 @src(i32 %x, i32 %y) {
%0:
  %r = uadd_sat i32 %x, %y
  ret i32 %r
}
=>
define i32 @tgt(i32 %x, i32 %y) {
%0:
  %t0 = sub nsw nuw i32 4294967295, %y
  %t1 = umin i32 %x, %t0
  %r = add nuw i32 %t1, %y
  ret i32 %r
}
Transformation seems to be correct!

The alternative, naive, lowering could be the following,
although i don't think it's better,
thought it will likely be needed for sadd/ssub/*shl:

----------------------------------------
define i32 @src(i32 %x, i32 %y) {
%0:
  %r = uadd_sat i32 %x, %y
  ret i32 %r
}
=>
define i32 @tgt(i32 %x, i32 %y) {
%0:
  %t0 = zext i32 %x to i33
  %t1 = zext i32 %y to i33
  %t2 = add nuw i33 %t0, %t1
  %t3 = zext i32 4294967295 to i33
  %t4 = umin i33 %t2, %t3
  %r = trunc i33 %t4 to i32
  ret i32 %r
}
Transformation seems to be correct!

19 months ago[SCEV] Recognize @llvm.usub.sat as `%x - (umin %x, %y)`
Roman Lebedev [Mon, 21 Sep 2020 15:05:47 +0000 (18:05 +0300)]
[SCEV] Recognize @llvm.usub.sat as `%x - (umin %x, %y)`

----------------------------------------
define i32 @src(i32 %x, i32 %y) {
%0:
  %r = usub_sat i32 %x, %y
  ret i32 %r
}
=>
define i32 @tgt(i32 %x, i32 %y) {
%0:
  %t0 = umin i32 %x, %y
  %r = sub nuw i32 %x, %t0
  ret i32 %r
}
Transformation seems to be correct!

19 months ago[NFC][SCEV] Add tests for @llvm.*.sat intrinsics
Roman Lebedev [Mon, 21 Sep 2020 14:58:31 +0000 (17:58 +0300)]
[NFC][SCEV] Add tests for @llvm.*.sat intrinsics

19 months ago[SCEV] Recognize @llvm.abs as smax(x, -x)
Roman Lebedev [Mon, 21 Sep 2020 14:16:08 +0000 (17:16 +0300)]
[SCEV] Recognize @llvm.abs as smax(x, -x)

As per alive2 (ignoring undef):

----------------------------------------
define i32 @src(i32 %x, i1 %y) {
%0:
  %r = abs i32 %x, 0
  ret i32 %r
}
=>
define i32 @tgt(i32 %x, i1 %y) {
%0:
  %neg_x = mul i32 %x, 4294967295
  %r = smax i32 %x, %neg_x
  ret i32 %r
}
Transformation seems to be correct!

----------------------------------------
define i32 @src(i32 %x, i1 %y) {
%0:
  %r = abs i32 %x, 1
  ret i32 %r
}
=>
define i32 @tgt(i32 %x, i1 %y) {
%0:
  %neg_x = mul nsw i32 %x, 4294967295
  %r = smax i32 %x, %neg_x
  ret i32 %r
}
Transformation seems to be correct!

19 months ago[NFC][SCEV] Add tests for @llvm.abs intrinsic
Roman Lebedev [Mon, 21 Sep 2020 14:01:11 +0000 (17:01 +0300)]
[NFC][SCEV] Add tests for @llvm.abs intrinsic

19 months ago[SLP] Use for-range loops across ValueLists. NFCI.
Simon Pilgrim [Mon, 21 Sep 2020 17:24:08 +0000 (18:24 +0100)]
[SLP] Use for-range loops across ValueLists. NFCI.

Also rename some existing loops that used a 'j' iterator to consistently use 'V'.

19 months ago[cmake] Centralize LLVM_ENABLE_WARNINGS option
Dave Lee [Mon, 21 Sep 2020 17:22:51 +0000 (10:22 -0700)]
[cmake] Centralize LLVM_ENABLE_WARNINGS option

Configure default value of `LLVM_ENABLE_WARNINGS` in `HandleLLVMOptions.cmake`.

`LLVM_ENABLE_WARNINGS` is documented as ON by default, but `HandleLLVMOptions` assumes the default has been set somewhere else. If it has not been explicitly set, then `HandleLLVMOptions` implicitly uses OFF as a default.

This removes the various `option()` declarations in favor of a single declaration in `HandleLLVMOptions`. This will prevent the unwanted use of `-w` that is mentioned in a couple of the comments.

Reviewed By: DavidTruby, #libunwind, JDevlieghere, compnerd

Differential Revision: https://reviews.llvm.org/D87243

19 months ago[lldb/Commands] Fix outdated `breakpoint command add` help string
Dave Lee [Wed, 16 Sep 2020 23:40:48 +0000 (16:40 -0700)]
[lldb/Commands] Fix outdated `breakpoint command add` help string

Update the some examples in the help string for `breakpoint command add`.

Python breakpoint commands have different output than what's shown in the help string.

Notes:
  * Removed an example containing an inner function, as it seems more about a Python technique than about `command script add`
  * Updated `print x` to `print(x)` to be python 2/3 agnostic

Differential Revision: https://reviews.llvm.org/D87807

19 months agoThe wrong placement of add pass with optimizations led to -funique-internal-linkage...
Sriraman Tallam [Mon, 21 Sep 2020 16:53:09 +0000 (09:53 -0700)]
The wrong placement of add pass with optimizations led to -funique-internal-linkage-names being disabled.

Fixed the placement of the MPM.addpass for UniqueInternalLinkageNames to make
it work correctly with -O2 and new pass manager. Updated the tests to
explicitly check O0 and O2.

Previously, the addPass was placed before BackendUtil.cpp#L1373 which is wrong
as MPM gets assigned at this point and any additions to the pass vector before
this is wrong. This change just moves it after MPM is assigned and places it at
a point where O0 and O0+ can share it.

Differential Revision: https://reviews.llvm.org/D87921

19 months ago[SLP] simplify interface for gather(); NFC
Sanjay Patel [Mon, 21 Sep 2020 16:54:07 +0000 (12:54 -0400)]
[SLP] simplify interface for gather(); NFC

The implementation of gather() should be reduced too,
but this change by itself makes things a little clearer:
we don't try to gather to a different type or
number-of-values than whatever is passed in as the value
list itself.

19 months agoImplicitNullChecks.cpp - use auto const& iterators in for-range loops to avoid copies...
Simon Pilgrim [Mon, 21 Sep 2020 16:38:23 +0000 (17:38 +0100)]
ImplicitNullChecks.cpp - use auto const& iterators in for-range loops to avoid copies. NFCI.

19 months ago[SCEV] Add additional max BTC tests with loop guards.
Florian Hahn [Mon, 21 Sep 2020 16:35:46 +0000 (17:35 +0100)]
[SCEV] Add additional max BTC tests with loop guards.

19 months ago[ObjCARC][NewPM] Port objc-arc-contract to NPM
Arthur Eubanks [Wed, 2 Sep 2020 23:22:24 +0000 (16:22 -0700)]
[ObjCARC][NewPM] Port objc-arc-contract to NPM

Similar to https://reviews.llvm.org/D86178.

This is a module pass instead of a function pass since
ARCRuntimeEntryPoints can lazily add function declarations.

Reviewed By: ahatanak

Differential Revision: https://reviews.llvm.org/D87806

19 months ago[ARM][CMSE] Issue an error if passing arguments through memory across
Momchil Velikov [Mon, 21 Sep 2020 12:22:11 +0000 (13:22 +0100)]
[ARM][CMSE] Issue an error if passing arguments through memory across
security boundary

It was never supported and that part was accidentally omitted when
upstreaming D76518.

Differential Revision: https://reviews.llvm.org/D86478

Change-Id: If6ba9506eb0431c87a1d42a38aa60e47ce263039

19 months agoTargetPassConfig.cpp - use auto const& iterator in for-range loop to avoid copies...
Simon Pilgrim [Mon, 21 Sep 2020 16:16:57 +0000 (17:16 +0100)]
TargetPassConfig.cpp - use auto const& iterator in for-range loop to avoid copies. NFCI.

19 months agoSLPVectorizer.cpp - fix include ordering. NFCI.
Simon Pilgrim [Mon, 21 Sep 2020 16:08:59 +0000 (17:08 +0100)]
SLPVectorizer.cpp - fix include ordering. NFCI.

19 months ago[Sema] Split special builtin type lookups into a separate function
Raul Tambre [Sun, 20 Sep 2020 08:14:20 +0000 (11:14 +0300)]
[Sema] Split special builtin type lookups into a separate function

In case further such cases appear in the future we've got a generic function to add them to.
Additionally changed the ObjC special case to check the language and the identifier builtin ID instead of the name.

Addresses the cleanup suggestion from D87917.

Reviewed By: rjmccall

Differential Revision: https://reviews.llvm.org/D87983

19 months ago[clang] Fix a misleading variable name. NFC.
Igor Kudrin [Mon, 21 Sep 2020 15:59:34 +0000 (22:59 +0700)]
[clang] Fix a misleading variable name. NFC.

The variable is true when frame pointers should be omitted in leaf
functions, not kept.

Differential Revision: https://reviews.llvm.org/D88021

19 months agoMachineCSE.cpp - use auto const& iterator in for-range loop to avoid copies. NFCI.
Simon Pilgrim [Mon, 21 Sep 2020 15:38:44 +0000 (16:38 +0100)]
MachineCSE.cpp - use auto const& iterator in for-range loop to avoid copies. NFCI.

19 months agoFix Wdocumentation unknown parameter warnings. NFCI.
Simon Pilgrim [Mon, 21 Sep 2020 15:28:57 +0000 (16:28 +0100)]
Fix Wdocumentation unknown parameter warnings. NFCI.

19 months agoProfileSummary.cpp - use auto const& iterator in for-range loop to avoid copies....
Simon Pilgrim [Mon, 21 Sep 2020 15:28:10 +0000 (16:28 +0100)]
ProfileSummary.cpp - use auto const& iterator in for-range loop to avoid copies. NFCI.

19 months ago[SVE][CodeGen] Mark ptrue/pfalse instructions as rematerializable
David Sherwood [Mon, 21 Sep 2020 12:59:35 +0000 (13:59 +0100)]
[SVE][CodeGen] Mark ptrue/pfalse instructions as rematerializable

19 months ago[TextAPI] clean up auto usages in tests, NFC
Cyndy Ishida [Fri, 18 Sep 2020 19:22:46 +0000 (12:22 -0700)]
[TextAPI] clean up auto usages in tests, NFC

19 months ago[LLD][ELF][test] Fix CHECKs in map-file test
Edd Dawson [Mon, 21 Sep 2020 15:24:47 +0000 (18:24 +0300)]
[LLD][ELF][test] Fix CHECKs in map-file test

A repeated typo in lld/test/ELF/map-file.s prevented a number of checks from being executed.

CHECk-NEXT -> CHECK-NEXT
    ^             ^

After correcting the typo, a small adjustment was needed to match the size of the synthetic .comment section (which always contains "LLD 1.0" in the test environment).

Differential revision: https://reviews.llvm.org/D88023

19 months ago[PowerPC] Add vector pair load/store instructions and vector pair register class
Baptiste Saleil [Mon, 21 Sep 2020 15:23:51 +0000 (10:23 -0500)]
[PowerPC] Add vector pair load/store instructions and vector pair register class

This patch adds support for the lxvp, lxvpx, plxvp, stxvp, stxvpx and pstxvp
instructions in the PowerPC backend. These instructions allow loading and
storing VSX register pairs. This patch also adds the VSRp register class
definition needed for these instructions.

Differential Revision: https://reviews.llvm.org/D84359

19 months ago[LoopSimplifyCFG][NewPM] Rename simplify-cfg -> loop-simplifycfg
Arthur Eubanks [Fri, 18 Sep 2020 21:43:36 +0000 (14:43 -0700)]
[LoopSimplifyCFG][NewPM] Rename simplify-cfg -> loop-simplifycfg

This matches the legacy PM name and makes all tests in
Transforms/LoopSimplifyCFG pass under NPM.

Reviewed By: arsenm

Differential Revision: https://reviews.llvm.org/D87948

19 months ago[mlir][openacc] Add attributes to parallel op async, wait and self clauses
Valentin Clement [Mon, 21 Sep 2020 15:24:43 +0000 (11:24 -0400)]
[mlir][openacc] Add attributes to parallel op async, wait and self clauses

Add attributes for the async, wait and self clauses. These clauses can be present without
values. When this is the case they are modelled with an attribute instead of operands.

Reviewed By: ftynse

Differential Revision: https://reviews.llvm.org/D87991

19 months ago[CostModel][X86] Add some select shuffle costs tests for D87884
Simon Pilgrim [Mon, 21 Sep 2020 15:08:50 +0000 (16:08 +0100)]
[CostModel][X86] Add some select shuffle costs tests for D87884

19 months agoUpdate update_analyze_test_checks.py to support API changes from D83004
Simon Pilgrim [Mon, 21 Sep 2020 14:55:46 +0000 (15:55 +0100)]
Update update_analyze_test_checks.py to support API changes from D83004

19 months ago[analyzer][solver] Fix issue with symbol non-equality tracking
Gabor Marton [Mon, 21 Sep 2020 11:42:13 +0000 (13:42 +0200)]
[analyzer][solver] Fix issue with symbol non-equality tracking

We should track non-equivalency (disequality) in case of greater-then or
less-then assumptions.

Differential Revision: https://reviews.llvm.org/D88019

19 months ago[SLP] Allow reordering of vectorization trees with reused instructions.
Alexey Bataev [Fri, 18 Sep 2020 20:45:21 +0000 (16:45 -0400)]
[SLP] Allow reordering of vectorization trees with reused instructions.

If some leaves have the same instructions to be vectorized, we may
incorrectly evaluate the best order for the root node (it is built for the
vector of instructions without repeated instructions and, thus, has less
elements than the root node). In this case we just can not try to reorder
the tree + we may calculate the wrong number of nodes that requre the
same reordering.
For example, if the root node is \<a+b, a+c, a+d, f+e\>, then the leaves
are \<a, a, a, f\> and \<b, c, d, e\>. When we try to vectorize the first
leaf, it will be shrink to \<a, b\>. If instructions in this leaf should
be reordered, the best order will be \<1, 0\>. We need to extend this
order for the root node. For the root node this order should look like
\<3, 0, 1, 2\>. This patch allows extension of the orders of the nodes
with the reused instructions.

Reviewed By: RKSimon

Differential Revision: https://reviews.llvm.org/D45263

19 months ago[AIX][Clang][Driver] Add handling of nostartfiles option
David Tenty [Fri, 28 Aug 2020 18:38:59 +0000 (14:38 -0400)]
[AIX][Clang][Driver] Add handling of nostartfiles option

Reviewed By: jasonliu

Differential Revision: https://reviews.llvm.org/D87904

19 months ago[ASTImporter] Refactor IsStructurallyEquivalent's Decl overloads to be more consistent
Raphael Isemann [Mon, 21 Sep 2020 12:53:35 +0000 (14:53 +0200)]
[ASTImporter] Refactor IsStructurallyEquivalent's Decl overloads to be more consistent

There are several `::IsStructurallyEquivalent` overloads for Decl subclasses
that are used for comparing declarations. There is also one overload that takes
just two Decl pointers which ends up queuing the passed Decls to be later
compared in `CheckKindSpecificEquivalence`.

`CheckKindSpecificEquivalence` implements the dispatch logic for the different
Decl subclasses. It is supposed to hand over the queued Decls to the
subclass-specific `::IsStructurallyEquivalent` overload that will actually
compare the Decl instance. It also seems to implement a few pieces of actual
node comparison logic inbetween the dispatch code.

This implementation causes that the different overloads of
`::IsStructurallyEquivalent` do different (and sometimes no) comparisons
depending on which overload of `::IsStructurallyEquivalent` ends up being
called.

For example, if I want to compare two FieldDecl instances, then I could either
call the `::IsStructurallyEquivalent` with `Decl *` or with `FieldDecl *`
parameters. The overload that takes FieldDecls is doing a correct comparison.
However, the `Decl *` overload just queues the Decl pair.
`CheckKindSpecificEquivalence` has no dispatch logic for `FieldDecl`, so it
always returns true and never does any actual comparison.

On the other hand, if I try to compare two FunctionDecl instances the two
possible overloads of `::IsStructurallyEquivalent` have the opposite behaviour:
The overload that takes `FunctionDecl` pointers isn't comparing the names of the
FunctionDecls while the overload taking a plain `Decl` ends up comparing the
function names (as the comparison logic for that is implemented in
`CheckKindSpecificEquivalence`).

This patch tries to make this set of functions more consistent by making
`CheckKindSpecificEquivalence` a pure dispatch function without any
subclass-specific comparison logic. Also the dispatch logic is now autogenerated
so it can no longer miss certain subclasses.

The comparison code from `CheckKindSpecificEquivalence` is moved to the
respective `::IsStructurallyEquivalent` overload so that the comparison result
no longer depends if one calls the `Decl *` overload or the overload for the
specific subclass. The only difference is now that the `Decl *` overload is
queuing the parameter while the subclass-specific overload is directly doing the
comparison.

`::IsStructurallyEquivalent` is an implementation detail and I don't think the
behaviour causes any bugs in the current implementation (as carefully calling
the right overload for the different classes works around the issue), so the
test for this change is that I added some new code for comparing `MemberExpr`.
The new comparison code always calls the dispatching overload and it previously
failed as the dispatch didn't support FieldDecls.

Reviewed By: martong, a_sidorin

Differential Revision: https://reviews.llvm.org/D87619

19 months agoDWARFEmitter.cpp - use auto const& iterators in for-range loops to avoid copies....
Simon Pilgrim [Mon, 21 Sep 2020 14:15:51 +0000 (15:15 +0100)]
DWARFEmitter.cpp - use auto const& iterators in for-range loops to avoid copies. NFCI.

19 months agoChange comments about order of classes in superclass list.
Paul C. Anagnostopoulos [Sat, 19 Sep 2020 16:22:12 +0000 (12:22 -0400)]
Change comments about order of classes in superclass list.

19 months ago[llvm-readobj/libObject] - Get rid of `FirstSym` argument. NFCI.
Georgii Rymar [Mon, 21 Sep 2020 11:00:42 +0000 (14:00 +0300)]
[llvm-readobj/libObject] - Get rid of `FirstSym` argument. NFCI.

We use `FirstSym` argument in `getExtendedSymbolTableIndex` to calculate
a symbol index:

```
&Sym - &FirstSym
```

Instead, we could pass the symbol index directly.
This is what this patch does, it allows to simplify another llvm-readobj API.

Differential revision: https://reviews.llvm.org/D88016

19 months agoDWARFYAML::emitDebugSections - remove unnecessary cantFail(success) call. NFCI.
Simon Pilgrim [Mon, 21 Sep 2020 13:06:56 +0000 (14:06 +0100)]
DWARFYAML::emitDebugSections - remove unnecessary cantFail(success) call. NFCI.

As mentioned on rG6bb912336804.

19 months ago[gn build] Port 4fc0214a101
LLVM GN Syncbot [Mon, 21 Sep 2020 12:47:54 +0000 (12:47 +0000)]
[gn build] Port 4fc0214a101

19 months ago[Statepoints][ISEL] gc.relocate uniquification should be based on SDValue, not IR...
Denis Antrushin [Tue, 15 Sep 2020 14:10:07 +0000 (21:10 +0700)]
[Statepoints][ISEL] gc.relocate uniquification should be based on SDValue, not IR Value.

When exporting statepoint results to virtual registers we try to avoid
generating exports for duplicated inputs. But we erroneously use
IR Value* to check if inputs are duplicated. Instead, we should use
SDValue, because even different IR values can get lowered to the same
SDValue.
I'm adding a (degenerate) test case which emphasizes importance of this
feature for invoke statepoints.
If we fail to export only unique values we will end up with something
like that:

  %0 = STATEPOINT
  %1 = COPY %0

landing_pad:
  <use of %1>

And when exceptional path is taken, %1 is left uninitialized (COPY is never
execute).

Reviewed By: reames

Differential Revision: https://reviews.llvm.org/D87695

19 months ago[clang-tidy] New check cppcoreguidelines-prefer-member-initializer
Adam Balogh [Fri, 11 Sep 2020 08:12:39 +0000 (10:12 +0200)]
[clang-tidy] New check cppcoreguidelines-prefer-member-initializer

Finds member initializations in the constructor body which can be placed
into the initialization list instead. This does not only improves the
readability of the code but also affects positively its performance.
Class-member assignments inside a control statement or following the
first control statement are ignored.

Differential Revision: https://reviews.llvm.org/D71199

19 months ago[SVE] Change definition of reduction ISD nodes to have an SVE vector result type.
Paul Walker [Thu, 17 Sep 2020 11:04:35 +0000 (12:04 +0100)]
[SVE] Change definition of reduction ISD nodes to have an SVE vector result type.

The current nodes, AArch64::SMAXV_PRED for example, are defined to
return a NEON vector result.  This is incorrect because they modify
the complete SVE register and are thus changed to represent such.

This patch also adds nodes for UADDV_PRED and SADDV_PRED, which
unifies the handling of all SVE reductions.

NOTE: Floating-point reductions are already implemented correctly,
so this patch is essentially making everything consistent with those.

Differential Revision: https://reviews.llvm.org/D87843

19 months ago[SVE] Use NEON for extract_vector_elt when the index is in range.
Paul Walker [Thu, 17 Sep 2020 14:04:31 +0000 (15:04 +0100)]
[SVE] Use NEON for extract_vector_elt when the index is in range.

Patch also adds missing patterns for unpacked vector types and
extracts of element zero.

Differential Revision: https://reviews.llvm.org/D87842

19 months ago[SyntaxTree][NFC] follow naming convention + remove auto on empty vector declaration
Eduardo Caldas [Mon, 21 Sep 2020 08:39:02 +0000 (08:39 +0000)]
[SyntaxTree][NFC] follow naming convention + remove auto on empty vector declaration

Differential Revision: https://reviews.llvm.org/D88004

19 months ago[MLIR] Fix typo and expand gpu.host_register description.
Christian Sigg [Wed, 19 Aug 2020 13:50:44 +0000 (15:50 +0200)]
[MLIR] Fix typo and expand gpu.host_register description.

See comments in https://reviews.llvm.org/D85631.

Reviewed By: herhut

Differential Revision: https://reviews.llvm.org/D86214

19 months agoFix buildbot.
Haojian Wu [Mon, 21 Sep 2020 11:29:44 +0000 (13:29 +0200)]
Fix buildbot.

TemplateArgumentLocInfo cannot result in a constant expression anymore
after D87080.

19 months agoRevert "[NFC][ScheduleDAG] Remove unused EntrySU SUnit"
Alexander Belyaev [Mon, 21 Sep 2020 11:18:39 +0000 (13:18 +0200)]
Revert "[NFC][ScheduleDAG] Remove unused EntrySU SUnit"

This reverts commit 0345d88de654259ae90494bf9b015416e2cccacb.

Google internal backend uses EntrySU, we are looking into removing
dependency on it.

Differential Revision: https://reviews.llvm.org/D88018

19 months ago[AST] Reduce the size of TemplateArgumentLocInfo.
Haojian Wu [Mon, 21 Sep 2020 11:08:17 +0000 (13:08 +0200)]
[AST] Reduce the size of TemplateArgumentLocInfo.

allocate the underlying data of Template kind separately, this would reduce AST
memory usage

- TemplateArgumentLocInfo 24 => 8 bytes
- TemplateArgumentLoc  48 => 32 bytes
- DynTypeNode 56 => 40 bytes

ASTContext::.getASTAllocatedMemory changes:
  SemaDecl.cpp 255.5 MB => 247.5MB
  SemaExpr.cpp 293.5 MB => 283.5MB

Differential Revision: https://reviews.llvm.org/D87080

19 months agoRecommit "[SCEV] Look through single value PHIs."
Florian Hahn [Mon, 21 Sep 2020 10:03:27 +0000 (11:03 +0100)]
Recommit "[SCEV] Look through single value PHIs."

This commit was originally because it was suspected to cause a crash,
but a reproducer did not surface.

A crash that was exposed by this change was fixed in 1d8f2e52925b.

This reverts the revert commit 0581c0b0eeba03da590d1176a4580cf9b9e8d1e3.

19 months ago[mlir][VectorOps] Loosen restrictions on vector.reduction types
Benjamin Kramer [Mon, 21 Sep 2020 10:04:33 +0000 (12:04 +0200)]
[mlir][VectorOps] Loosen restrictions on vector.reduction types

LLVM can deal with any integer or float type, don't arbitrarily restrict
it to f32/f64/i32/i64.

Differential Revision: https://reviews.llvm.org/D88010

19 months ago[ARM] Select f32 constants with vmov.f16
David Green [Mon, 21 Sep 2020 10:10:47 +0000 (11:10 +0100)]
[ARM] Select f32 constants with vmov.f16

This adds lowering for f32 values using the vmov.f16, which zeroes the
top bits whilst setting the lower bits to a pattern. This range of
values does not often come up, except where a f16 constant value has
been converted to a f32.

Differential Revision: https://reviews.llvm.org/D87790

19 months agoDo not dereference an array out of bound just to take its address
serge-sans-paille [Fri, 18 Sep 2020 09:02:15 +0000 (11:02 +0200)]
Do not dereference an array out of bound just to take its address

This is UB by the standard, and caught by the libstdc++ asserts

Differential Revision: https://reviews.llvm.org/D87892

19 months ago[llvm-readelf/obj] - Stop printing invalid names for unnamed section symbols.
Georgii Rymar [Tue, 15 Sep 2020 13:17:08 +0000 (16:17 +0300)]
[llvm-readelf/obj] - Stop printing invalid names for unnamed section symbols.

We have an issue with `ELFDumper<ELFT>::getSymbolSectionName`:
1) It is used deeply for both LLVM/GNU styles and might return LLVM-style only
   values to describe symbols: "Undefined", "Processor Specific", "Absolute", etc.

2) `getSymbolSectionName` is used by `getFullSymbolName` and these special values
   might appear instead of symbol names in many places.
   This occurs for unnamed section symbols currently.

This patch extracts the LLVM specific logic to `LLVMStyle<ELFT>::printSymbolSection`,
which seems to be the only place where we want to print the special values mentioned.
It also adds a meaningful new warning that is reported when we are unable to get
a section index for a section symbol.

Differential revision: https://reviews.llvm.org/D87764

19 months ago[NFC][ARM] More tail predication tests.
Sam Parker [Mon, 21 Sep 2020 09:54:11 +0000 (10:54 +0100)]
[NFC][ARM] More tail predication tests.

Add mir tests for use/def of P0.

19 months ago[AArch64] Cortex-A55 scheduler model
Sjoerd Meijer [Mon, 21 Sep 2020 09:39:28 +0000 (10:39 +0100)]
[AArch64] Cortex-A55 scheduler model

This is an initial commit adding the A55 model, but it isn't used/enabled yet.
We will follow up on this to improve the model, then flip the switch.

The optimisation guide describing Cortex-A55 micro-architecture in more detail
can be found here:

https://static.docs.arm.com/epm128372/20/arm_cortex_a55_software_optimization_guide_v2.pdf

Original patch by Javed Absar.

Differential Revision: https://reviews.llvm.org/D46884

19 months ago[mlir] Shape.AssumingOp implements RegionBranchOpInterface.
Tres Popp [Fri, 18 Sep 2020 09:14:32 +0000 (11:14 +0200)]
[mlir] Shape.AssumingOp implements RegionBranchOpInterface.

This adds support for the interface and provides unambigious information
on the control flow as it is unconditional on any runtime values.
The code is tested through confirming that buffer-placement behaves as
expected.

Differential Revision: https://reviews.llvm.org/D87894

19 months ago[SyntaxTree][Synthesis] Implement `deepCopy`
Eduardo Caldas [Wed, 16 Sep 2020 07:56:47 +0000 (07:56 +0000)]
[SyntaxTree][Synthesis] Implement `deepCopy`

Differential Revision: https://reviews.llvm.org/D87749

19 months ago[compiler-rt] Fix atomic support functions on 32-bit architectures
Alex Richardson [Mon, 21 Sep 2020 08:00:54 +0000 (09:00 +0100)]
[compiler-rt] Fix atomic support functions on 32-bit architectures

The code currently uses __c11_atomic_is_lock_free() to detect whether an
atomic operation is natively supported. However, this can result in a
runtime function call to determine whether the given operation is lock-free
and clang generating a call to e.g. __atomic_load_8 since the branch is
not a constant zero. Since we are implementing those runtime functions, we
must avoid those calls. This patch replaces __c11_atomic_is_lock_free()
with __atomic_always_lock_free() which always results in a compile-time
constant value. This problem was found while compiling atomic.c for MIPS32
since the -Watomic-alignment warning was being triggered and objdump showed
an undefined reference to _atomic_is_lock_free.

In addition to fixing 32-bit platforms this also enables the 16-byte case
that was disabled in r153779 (185f2edd70a34d28b305df0cd8ce519ecbca2cfd).

Reviewed By: efriedma

Differential Revision: https://reviews.llvm.org/D86510

19 months ago[RISC-V] Implement RISCVInstrInfo::isCopyInstrImpl()
Alex Richardson [Mon, 21 Sep 2020 07:59:22 +0000 (08:59 +0100)]
[RISC-V] Implement RISCVInstrInfo::isCopyInstrImpl()

This does not result in changes for any of the current tests, but it might
improve debug information in some cases.

Reviewed By: luismarques

Differential Revision: https://reviews.llvm.org/D86522

19 months ago[lld][ELF][test] Add additional LTO testing
James Henderson [Thu, 17 Sep 2020 10:23:58 +0000 (11:23 +0100)]
[lld][ELF][test] Add additional LTO testing

The additional testing is testing we previously had in a downstream test
suite.

Reviewed by: grimar, MaskRay

Differential Revision: https://reviews.llvm.org/D87824

19 months ago[Test] Test auto-update
Max Kazantsev [Mon, 21 Sep 2020 09:05:29 +0000 (16:05 +0700)]
[Test] Test auto-update

19 months ago[CodeGen] Fixing inconsistent ABI mangling of vlaues in SelectionDAGBuilder
Lucas Prates [Thu, 17 Sep 2020 17:07:35 +0000 (18:07 +0100)]
[CodeGen] Fixing inconsistent ABI mangling of vlaues in SelectionDAGBuilder

SelectionDAGBuilder was inconsistently mangling values based on ABI
Calling Conventions when getting them through copyFromRegs in
SelectionDAGBuilder, causing duplicate value type convertions for
function arguments. The checking for the mangling requirement was based
on the value's originating instruction and was performed outside of, and
inspite of, the regular Calling Convention Lowering.

The issue could be observed in a scenario such as:

```
%arg1 = load half, half* %const, align 2
%arg2 = call fastcc half @someFunc()
call fastcc void @otherFunc(half %arg1, half %arg2)
; Here, %arg2 was incorrectly mangled twice, as the CallConv data from
; the call to @someFunc() was taken into consideration for the check
; when getting the value for processing the call to @otherFunc(...),
; after the proper convertion had taken place when lowering the return
; value of the first call.
```

This patch fixes the issue by disregarding the Calling Convention
information for such copyFromRegs, making sure the ABI mangling is
properly contanined in the Calling Convention Lowering.

This fixes Bugzilla #47454.

Reviewed By: efriedma

Differential Revision: https://reviews.llvm.org/D87844

19 months agoFix crash in the pass pipeline when local reproducer is enabled
Mehdi Amini [Mon, 21 Sep 2020 06:42:25 +0000 (06:42 +0000)]
Fix crash in the pass pipeline when local reproducer is enabled

This crash only happens when a function pass is followed by a module
pass. In this case the splitting of the pass pipeline didn't handle
properly the verifier passes and ended up with an odd number of pass in
the pipeline, breaking an assumption of the local crash reproducer
executor and hitting an assertion.

Differential Revision: https://reviews.llvm.org/D88000

19 months ago[LSR] Preserve MSSA when using SplitCriticalEdge.
Florian Hahn [Sun, 20 Sep 2020 11:40:35 +0000 (12:40 +0100)]
[LSR] Preserve MSSA when using SplitCriticalEdge.

LSR claims to MemorySSA, but we also have to make sure it is preserved
when splitting critical edges. This can be done by passing MSSAU to
SplitCriticalEdge.

Fixes PR47557.

19 months ago[clang] Fix incorrect call to TextDiagnostic::printDiagnosticMessage
Andrzej Warzynski [Wed, 16 Sep 2020 16:54:29 +0000 (17:54 +0100)]
[clang] Fix incorrect call to TextDiagnostic::printDiagnosticMessage

As per the documentation, the 2nd argument in printDiagnosticMessage
should be a bool that specifies whether the underlying message is a
continuation note diagnostic or not. More specifically, it should be:
```
Level == DiagnosticsEngine::Note
```
instead of:
```
Level
```

This change means that `no input file` in the following scenario will be
now correctly printed in bold:
```
$ bin/clang
clang: error: no input files
```
In terminals that don't support text formatting the behaviour doesn't
change.

Differential Revision: https://reviews.llvm.org/D87816

19 months ago[clang][AArch64] Correct return type of Neon vqmovun intrinsics
David Spickett [Mon, 14 Sep 2020 13:16:20 +0000 (14:16 +0100)]
[clang][AArch64] Correct return type of Neon vqmovun intrinsics

Neon intrinsics vqmovunh_s16, vqmovuns_s32, vqmovund_s64
should have unsigned return types.

See https://developer.arm.com/architectures/instruction-sets/simd-isas/neon/intrinsics?search=vqmovun

Fixes https://bugs.llvm.org/show_bug.cgi?id=46840

Reviewed By: efriedma

Differential Revision: https://reviews.llvm.org/D85118

19 months ago[SyntaxTree] Test for '\' inside token.
Eduardo Caldas [Fri, 18 Sep 2020 09:34:57 +0000 (09:34 +0000)]
[SyntaxTree] Test for '\' inside token.

Differential Revision: https://reviews.llvm.org/D87895

19 months ago[AST] Fix dependence-bits for CXXDefaultInitExpr.
Haojian Wu [Mon, 21 Sep 2020 06:42:24 +0000 (08:42 +0200)]
[AST] Fix dependence-bits for CXXDefaultInitExpr.

Reviewed By: sammccall

Differential Revision: https://reviews.llvm.org/D87382

19 months ago[SyntaxTree][Synthesis] Improve testing `createLeaf`
Eduardo Caldas [Thu, 17 Sep 2020 15:39:18 +0000 (15:39 +0000)]
[SyntaxTree][Synthesis] Improve testing `createLeaf`

The new test shows that `createLeaf` depends on the C++ version.

Differential Revision: https://reviews.llvm.org/D87896

19 months ago[c++20] Consistent with the intent to allow all plausible types in
Richard Smith [Mon, 21 Sep 2020 06:08:33 +0000 (23:08 -0700)]
[c++20] Consistent with the intent to allow all plausible types in
non-type template parameters, permit vector types.

19 months agoAdd missing new line after debug logging in MLIRContext (NFC)
Mehdi Amini [Sun, 20 Sep 2020 22:08:00 +0000 (22:08 +0000)]
Add missing new line after debug logging in MLIRContext (NFC)

19 months ago[docs][flang] Fix typos
SuJunda [Mon, 21 Sep 2020 05:32:18 +0000 (11:02 +0530)]
[docs][flang] Fix typos

Reviewed By: SouraVX

Differential Revision: https://reviews.llvm.org/D87885

19 months ago[EHStreamer] Fix a "Continue to action" -fverbose-asm comment when multi-byte LEB128...
Fangrui Song [Mon, 21 Sep 2020 04:41:29 +0000 (21:41 -0700)]
[EHStreamer] Fix a "Continue to action" -fverbose-asm comment when multi-byte LEB128 encoding is needed

This only happens with more than 64 action records and it is difficult to construct a test.

19 months ago[lld-macho] Export trie addresses should be relative to the image base
Jez Ng [Wed, 16 Sep 2020 18:20:10 +0000 (11:20 -0700)]
[lld-macho] Export trie addresses should be relative to the image base

We didn't notice this earlier this we were only testing the export trie
encoded in a dylib, whose image base starts at zero. But a regular
executable contains `__PAGEZERO`, which means it has a non-zero image
base. This bug was discovered after attempting to run some programs that
performed `dlopen` on an executable.

Reviewed By: #lld-macho, smeenai

Differential Revision: https://reviews.llvm.org/D87780

19 months ago[lld-macho] Mark weak symbols in symbol table
Jez Ng [Tue, 1 Sep 2020 03:32:39 +0000 (20:32 -0700)]
[lld-macho] Mark weak symbols in symbol table

Reviewed By: #lld-macho, smeenai

Differential Revision: https://reviews.llvm.org/D86908

19 months ago[c++20] For P1907R1: Add checking for structural types for non-type
Richard Smith [Mon, 21 Sep 2020 03:10:02 +0000 (20:10 -0700)]
[c++20] For P1907R1: Add checking for structural types for non-type
template parameters.

No support for the new kinds of non-type template argument yet.

This is not entirely NFC for prior language modes: we have historically
incorrectly accepted rvalue references as the types of non-type template
parameters. Such invalid code is now rejected.

19 months ago[PowerPC] Pass nofpexcept flag to custom lowered constrained ops
Qiu Chaofan [Mon, 21 Sep 2020 02:38:00 +0000 (10:38 +0800)]
[PowerPC] Pass nofpexcept flag to custom lowered constrained ops

This is a follow-up of D86605. For strict DAG FP node, if its FP
exception behavior metadata is ignore, it should have nofpexcept flag.
But during custom lowering, this flag isn't passed down.

This is also seen on X86 target.

Reviewed By: uweigand

Differential Revision: https://reviews.llvm.org/D87390

19 months ago[Polly][NewPM] Port Simplify to the new pass manager
Pengxuan Zheng [Tue, 8 Sep 2020 21:09:03 +0000 (14:09 -0700)]
[Polly][NewPM] Port Simplify to the new pass manager

Reviewed By: Meinersbur

Differential Revision: https://reviews.llvm.org/D87328

19 months ago[XRay] Change mips to use version 2 sled (PC-relative address)
Fangrui Song [Sat, 19 Sep 2020 22:44:39 +0000 (15:44 -0700)]
[XRay] Change mips to use version 2 sled (PC-relative address)

Follow-up to D78590. All targets use PC-relative addresses now.

Reviewed By: atanasyan, dberris

Differential Revision: https://reviews.llvm.org/D87977

19 months ago[llvm-profdata]Fix llvm-profdata crash on compact binary profile
wlei [Sun, 20 Sep 2020 23:50:08 +0000 (16:50 -0700)]
[llvm-profdata]Fix llvm-profdata crash on compact binary profile

llvm-profdata `show` and `overlap` will crash in `getFuncName` on compact binary profile. This change fixed this by switching to use `getName`.

 `getFuncName` is misused in llvm-profdata. As showed below, `GUIDToFuncNameMap` is only supported in compilation mode, there is no initialization in llvm-profdata. Compact profile whose MD5 is true would try to query `GUIDToFuncNameMap` then caused the crash. So fix this by switching to `getName`

Reviewed By: MaskRay, wmi, wenlei, weihe, hoy

Differential Revision: https://reviews.llvm.org/D87740

19 months ago[clangd] Fix typo in field name
Nathan Ridge [Sun, 20 Sep 2020 23:50:32 +0000 (19:50 -0400)]
[clangd] Fix typo in field name

Differential Revision: https://reviews.llvm.org/D87995

19 months ago[X86] Make reduceMaskedLoadToScalarLoad/reduceMaskedStoreToScalarStore work for avx51...
Craig Topper [Sun, 20 Sep 2020 20:53:26 +0000 (13:53 -0700)]
[X86] Make reduceMaskedLoadToScalarLoad/reduceMaskedStoreToScalarStore work for avx512 after type legalization.

The scalar elements of the vXi1 build_vector will have been type legalized to i8 by padding with 0s. So we can't check for all ones. Instead we should just look at bit 0 of the constant.

Differential Revision: https://reviews.llvm.org/D87863

19 months ago[X86] Pre-commit test cases for D87863. NFC
Craig Topper [Sun, 20 Sep 2020 20:52:04 +0000 (13:52 -0700)]
[X86] Pre-commit test cases for D87863. NFC

19 months ago[X86] Stop reduceMaskedLoadToScalarLoad/reduceMaskedStoreToScalarStore from creating...
Craig Topper [Sun, 20 Sep 2020 20:13:42 +0000 (13:13 -0700)]
[X86] Stop reduceMaskedLoadToScalarLoad/reduceMaskedStoreToScalarStore from creating scalar i64 load/stores in 32-bit mode

If we emit a scalar i64 load/store it will get type legalized to two i32 load/stores.

Differential Revision: https://reviews.llvm.org/D87862

19 months ago[X86] Add 32-bit command lines to masked_store.ll and masked_load.ll
Craig Topper [Sun, 20 Sep 2020 20:11:47 +0000 (13:11 -0700)]
[X86] Add 32-bit command lines to masked_store.ll and masked_load.ll

19 months ago[ARM] Constant fold VMOVrh
David Green [Sun, 20 Sep 2020 20:32:51 +0000 (21:32 +0100)]
[ARM] Constant fold VMOVrh

This adds simple constant folding for VMOVrh, to constant fold fp16
constants to integer values. It can help especially with soft calling
conventions, but some of the results are not optimal as we end up
loading using a vldr. This will be improved in a follow up patch.

Differential Revision: https://reviews.llvm.org/D87789

19 months ago[CVP] Additional tests for comparison with offset (NFC)
Nikita Popov [Sun, 20 Sep 2020 19:50:21 +0000 (21:50 +0200)]
[CVP] Additional tests for comparison with offset (NFC)

Both icmps have an additional offset here. We would fold this if
the second one didn't.

19 months ago[LVI] Get value range from mask comparison
Nikita Popov [Sun, 20 Sep 2020 19:07:52 +0000 (21:07 +0200)]
[LVI] Get value range from mask comparison

InstCombine likes to canonicalize comparisons of the form
X == C || X == C+1 into (X & -2) == C'. Make sure LVI can still
recover the value range from this. Can of course also be useful
for proper mask comparisons.

For the sake of clarity, the implementation goes through KnownBits
to compute the range.

19 months ago[CVP] Add tests for mask comparisons (NFC)
Nikita Popov [Sun, 20 Sep 2020 19:11:10 +0000 (21:11 +0200)]
[CVP] Add tests for mask comparisons (NFC)

19 months ago[LVI] Refactor getValueFromICmpCondition (NFC)
Nikita Popov [Sun, 20 Sep 2020 18:46:51 +0000 (20:46 +0200)]
[LVI] Refactor getValueFromICmpCondition (NFC)

Rewrite this in a way where the core logic is in a separate
function, that is invoked with swapped operands. This makes it
easier to add handling for additional icmp patterns.

19 months ago[X86][SSE] Fold EXTEND_VECTOR_INREG(EXTRACT_SUBVECTOR(EXTEND(X),0)) -> EXTEND_VECTOR_...
Simon Pilgrim [Sun, 20 Sep 2020 17:38:54 +0000 (18:38 +0100)]
[X86][SSE] Fold EXTEND_VECTOR_INREG(EXTRACT_SUBVECTOR(EXTEND(X),0)) -> EXTEND_VECTOR_INREG(X)

19 months ago[X86][SSE] Fold SIGN_EXTEND(SIGN_EXTEND_VECTOR_INREG(X)) -> SIGN_EXTEND_VECTOR_INREG(X)
Simon Pilgrim [Sun, 20 Sep 2020 16:11:01 +0000 (17:11 +0100)]
[X86][SSE] Fold SIGN_EXTEND(SIGN_EXTEND_VECTOR_INREG(X)) -> SIGN_EXTEND_VECTOR_INREG(X)

It should be possible to make this generic, but we're not great at checking legality of *_EXTEND_VECTOR_INREG ops so I'm conservatively putting this inside X86ISelLowering.cpp

19 months ago[InstCombine] factorize left shifts of add/sub
Sanjay Patel [Sun, 20 Sep 2020 16:55:24 +0000 (12:55 -0400)]
[InstCombine] factorize left shifts of add/sub

We do similar factorization folds in SimplifyUsingDistributiveLaws,
but that drops no-wrap properties. Propagating those optimally may
help solve:
https://llvm.org/PR47430

The propagation is all-or-nothing for these patterns: when all
3 incoming ops have nsw or nuw, the 2 new ops should have the
same no-wrap property:
https://alive2.llvm.org/ce/z/Dv8wsU

This also solves:
https://llvm.org/PR47584

19 months ago[InstCombine] replace zombie unreachable values with 'undef' before erasing
Sanjay Patel [Sun, 20 Sep 2020 16:21:01 +0000 (12:21 -0400)]
[InstCombine] replace zombie unreachable values with 'undef' before erasing

The test (currently crashing) is reduced from the example provided
in the post-commit discussion in D87149.

Differential Revision: https://reviews.llvm.org/D87965