5 years agoFix the project name in the license file.
Arnaud A. de Grandmaison [Mon, 27 Feb 2017 17:47:58 +0000 (17:47 +0000)]
Fix the project name in the license file.

llvm-svn: 296359

5 years agoAdd libcxxabi's LICENSE.TXT to libunwind.
Arnaud A. de Grandmaison [Mon, 27 Feb 2017 17:33:20 +0000 (17:33 +0000)]
Add libcxxabi's LICENSE.TXT to libunwind.

When libunwind was spinned off libcxxabi, most file were copied from
libcxxabi to libunwind.  However, libc++abi's toplevel LICENSE.TXT was
forgotten in the copying. It's considered a good practice to have the
license file at the root of the project, and making linunwind a separate
project was not supposed to change its licensing. Besides, several
header files refer to the LICENSE.TXT, so copy the one from libc++abi.

llvm-svn: 296358

5 years agoFix LLVM module build
Steven Wu [Mon, 27 Feb 2017 16:56:37 +0000 (16:56 +0000)]
Fix LLVM module build

Add WasmRelocs/WebAssembly.def to textual include header.

llvm-svn: 296356

5 years ago[X86] Use APInt instead of SmallBitVector tracking undef elements from getTargetConst...
Craig Topper [Mon, 27 Feb 2017 16:15:32 +0000 (16:15 +0000)]
[X86] Use APInt instead of SmallBitVector tracking undef elements from getTargetConstantBitsFromNode and getConstVector.

SmallBitVector uses a malloc for more than 58 bits on a 64-bit target and more than 27 bits on a 32-bit target. Some of the vector types we deal with here use more than those number of elements and therefore cause a malloc.

APInt on the other hand supports up to 64 bits without a malloc. That's the maximum number of bits we need here so we can avoid a malloc for all cases by using APInt.

Reviewers: RKSimon

Reviewed By: RKSimon

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D30392

llvm-svn: 296355

5 years ago[X86] Use APInt instead of SmallBitVector for tracking Zeroable elements in shuffle...
Craig Topper [Mon, 27 Feb 2017 16:15:30 +0000 (16:15 +0000)]
[X86] Use APInt instead of SmallBitVector for tracking Zeroable elements in shuffle lowering

SmallBitVector uses a malloc for more than 58 bits on a 64-bit target and more than 27 bits on a 32-bit target. Some of the vector types we deal with here use more than those number of elements and therefore cause a malloc.

APInt on the other hand supports up to 64 bits without a malloc. That's the maximum number of bits we need here so we can avoid a malloc for all cases by using APInt.

Reviewers: RKSimon

Reviewed By: RKSimon

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D30390

llvm-svn: 296354

5 years ago[X86] Fix SmallVector sizes in constant pool shuffle decoding to avoid heap allocation
Craig Topper [Mon, 27 Feb 2017 16:15:27 +0000 (16:15 +0000)]
[X86] Fix SmallVector sizes in constant pool shuffle decoding to avoid heap allocation

Some of the vectors are under sized to avoid heap allocation. In one case the vector was oversized.

Differential Revision: https://reviews.llvm.org/D30387

llvm-svn: 296353

5 years ago[X86] Use APInt instead of SmallBitVector for tracking undef elements in constant...
Craig Topper [Mon, 27 Feb 2017 16:15:25 +0000 (16:15 +0000)]
[X86] Use APInt instead of SmallBitVector for tracking undef elements in constant pool shuffle decoding

SmallBitVector uses a malloc for more than 58 bits on a 64-bit target and more than 27 bits on a 32-bit target. Some of the vector types we deal with here use more than those number of elements and therefore cause a malloc.

APInt on the other hand supports up to 64 bits without a malloc. That's the maximum number of bits we need here so we can avoid a malloc for all cases by using APInt. This will incur a minor increase in stack usage due to APInt storing the bit count separately from the data bits unlike SmallBitVector, but that should be ok.

Reviewers: RKSimon

Reviewed By: RKSimon

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D30386

llvm-svn: 296352

Asiri Rathnayake [Mon, 27 Feb 2017 16:10:57 +0000 (16:10 +0000)]

Add the missing check in the __config header.

llvm-svn: 296351

5 years agoRemove an empty line in icmp-illegal.ll . NFC
Amaury Sechet [Mon, 27 Feb 2017 16:09:44 +0000 (16:09 +0000)]
Remove an empty line in icmp-illegal.ll . NFC

llvm-svn: 296350

5 years ago[SLP] A test for a fix of PR32038.
Alexey Bataev [Mon, 27 Feb 2017 16:07:10 +0000 (16:07 +0000)]
[SLP] A test for a fix of PR32038.

llvm-svn: 296349

5 years ago[DeLICM] Add nomap regressions tests. NFC.
Michael Kruse [Mon, 27 Feb 2017 15:53:18 +0000 (15:53 +0000)]
[DeLICM] Add nomap regressions tests. NFC.

These verify that some scalars are not mapped because it would be
incorrect to do so.

For these check we verify that no transformation has been executed from
output of the pass's '-analyze'. Adding optimization remarks is not useful
as it would result in too many messages, even repeated ones. I avoided
checking the '-debug-only=polly-delicm' output which is an antipattern.

llvm-svn: 296348

5 years ago[DeLICM] Statistics for use in regression tests.
Michael Kruse [Mon, 27 Feb 2017 15:53:13 +0000 (15:53 +0000)]
[DeLICM] Statistics for use in regression tests.

Print some measurements of the DeLICM transformation at -analyze to be
used in regression tests.

llvm-svn: 296347

5 years agoFix typo in error message. NFC.
Asiri Rathnayake [Mon, 27 Feb 2017 15:49:51 +0000 (15:49 +0000)]
Fix typo in error message. NFC.

llvm-svn: 296346

5 years agoLoop predication expand both sides of the widened condition
Artur Pilipenko [Mon, 27 Feb 2017 15:44:49 +0000 (15:44 +0000)]
Loop predication expand both sides of the widened condition

This is a fix for a loop predication bug which resulted in malformed IR generation.

Loop invariant side of the widened condition is not guaranteed to be available in the preheader as is, so we need to expand it as well. See added unsigned_loop_0_to_n_hoist_length test for example.

Reviewed By: sanjoy, mkazantsev

Differential Revision: https://reviews.llvm.org/D30099

llvm-svn: 296345

5 years agoAttempt to fix arm-native libcxxabi tests for the no-exceptions variant
Asiri Rathnayake [Mon, 27 Feb 2017 15:31:34 +0000 (15:31 +0000)]
Attempt to fix arm-native libcxxabi tests for the no-exceptions variant

These tests embed calls to exceptions-related symbols from the abi library,
which are absent in the no-exceptions variant. The tests need to be marked
as unsupported for the no-exceptions configuration.

llvm-svn: 296344

5 years agoAArch64InstPrinter: rewrite of printSysAlias
Sjoerd Meijer [Mon, 27 Feb 2017 14:45:34 +0000 (14:45 +0000)]
AArch64InstPrinter: rewrite of printSysAlias

This is a cleanup/rewrite of the printSysAlias function. This was not using the
tablegen instruction descriptions, but was "manually" decoding the
instructions. This has been replaced with calls to lookup_XYZ_ByEncoding
tablegen calls.

This revealed several problems. First, instruction IVAU had the wrong encoding.
This was cancelled out by the parser that incorrectly matched the wrong
encoding. Second, instruction CVAP was missing from the SystemOperands tablegen
descriptions, so this has been added. And third, the required target features
were not captured in the tablegen descriptions, so support for this has also
been added.

Differential Revision: https://reviews.llvm.org/D30329

llvm-svn: 296343

5 years ago[ARM] LSL #0 is an alias of MOV
John Brawn [Mon, 27 Feb 2017 14:40:51 +0000 (14:40 +0000)]
[ARM] LSL #0 is an alias of MOV

Currently we handle this correctly in arm, but in thumb we don't which leads to
an unpredictable instruction being emitted for LSL #0 in an IT block and SP not
being permitted in some cases when it should be.

For the thumb2 LSL we can handle this by making LSL #0 an alias of MOV in the
.td file, but for thumb1 we need to handle it in checkTargetMatchPredicate to
get the IT handling right. We also need to adjust the handling of
MOV rd, rn, LSL #0 to avoid generating the 16-bit encoding in an IT block. We
should also adjust it to allow SP in the same way that it is allowed in
MOV rd, rn, but I haven't done that here because it looks like it would take
quite a lot of work to get right.

Additionally correct the selection of the 16-bit shift instructions in
processInstruction, where it was checking if the two registers were equal when
it should have been checking if they were low. It appears that previously this
code was never executed and the 16-bit encoding was selected by default, but
the other changes I've done here have somehow made it start being used.

Differential Revision: https://reviews.llvm.org/D30294

llvm-svn: 296342

5 years ago[clang-format] Add a NamespaceEndCommentsFixer
Krasimir Georgiev [Mon, 27 Feb 2017 13:28:36 +0000 (13:28 +0000)]
[clang-format] Add a NamespaceEndCommentsFixer

This patch adds a NamespaceEndCommentsFixer TokenAnalyzer for clang-format,
which fixes end namespace comments.
It currently supports inserting and updating existing wrong comments.

Example source:
namespace A {
int i;

namespace B {
int j;
} // namespace A

after formatting:
namespace A {
int i;
} // namespace A

namespace B {
int j;
} // namespace B

Reviewers: klimek, djasper

Reviewed By: djasper

Subscribers: klimek, mgorny

Differential Revision: https://reviews.llvm.org/D30269

llvm-svn: 296341

5 years agoAdd a test we already get right.
Rafael Espindola [Mon, 27 Feb 2017 13:21:18 +0000 (13:21 +0000)]
Add a test we already get right.

It would have found a problem in a patch I am writing.

llvm-svn: 296339

5 years agoFix cmake dependency for the external-thread-library variant. NFC.
Asiri Rathnayake [Mon, 27 Feb 2017 13:19:25 +0000 (13:19 +0000)]
Fix cmake dependency for the external-thread-library variant. NFC.

llvm-svn: 296338

5 years ago[clang-move] Extend clang-move to support moving global variable.
Haojian Wu [Mon, 27 Feb 2017 13:19:13 +0000 (13:19 +0000)]
[clang-move] Extend clang-move to support moving global variable.

Summary: Also support dumping global variables.

Reviewers: ioeric

Reviewed By: ioeric

Subscribers: cfe-commits

Differential Revision: https://reviews.llvm.org/D30337

llvm-svn: 296337

5 years ago[DAGCombine] Fix for a load combine bug with non-zero offset patterns on BE targets
Artur Pilipenko [Mon, 27 Feb 2017 13:04:23 +0000 (13:04 +0000)]
[DAGCombine] Fix for a load combine bug with non-zero offset patterns on BE targets

This pattern is essentially a i16 load from p+1 address:

  %p1.i16 = bitcast i8* %p to i16*
  %p2.i8 = getelementptr i8, i8* %p, i64 2
  %v1 = load i16, i16* %p1.i16
  %v2.i8 = load i8, i8* %p2.i8
  %v2 = zext i8 %v2.i8 to i16
  %v1.shl = shl i16 %v1, 8
  %res = or i16 %v1.shl, %v2

Current implementation would identify %v1 load as the first byte load and would mistakenly emit a i16 load from %p1.i16 address. This patch adds a check that the first byte is loaded from a non-zero offset of the first load address. This way this address can be used as the base address for the combined value. Otherwise just give up combining.

llvm-svn: 296336

5 years agoMerge Linux and FreeBSD arm register contexts
Pavel Labath [Mon, 27 Feb 2017 13:00:50 +0000 (13:00 +0000)]
Merge Linux and FreeBSD arm register contexts

These two register contexts were identical, so this shouldn't cause any
regressions, but I'd appreciate it if you can check that this at least compiles.

Reviewers: emaste, sas

Subscribers: aemerson, rengolin, lldb-commits, mgorny

Differential Revision: https://reviews.llvm.org/D27126

llvm-svn: 296335

5 years agoFix MinidumpParserTest on 32-bit arches
Pavel Labath [Mon, 27 Feb 2017 12:21:20 +0000 (12:21 +0000)]
Fix MinidumpParserTest on 32-bit arches

load_size should be 64-bit unconditionally to match the underlying API.
This makes sure the MAX value correctly signals to auto-detect the file
size when mmap()ing.

llvm-svn: 296334

5 years agoRemove the callback-based log channel registration mechanism
Pavel Labath [Mon, 27 Feb 2017 12:21:16 +0000 (12:21 +0000)]
Remove the callback-based log channel registration mechanism

All the existing channels have beens switched to the new mechanism and
this code is now unused.

llvm-svn: 296333

5 years ago[DAGCombine] NFC. MatchLoadCombine extract MemoryByteOffset lambda helper
Artur Pilipenko [Mon, 27 Feb 2017 11:42:54 +0000 (11:42 +0000)]
[DAGCombine] NFC. MatchLoadCombine extract MemoryByteOffset lambda helper

This refactoring will simplify the upcoming change to fix the bug in folding patterns with non-zero offsets on BE targets.

llvm-svn: 296332

5 years ago[DAGCombine] NFC. MatchLoadCombine remember the first byte provider, not the load...
Artur Pilipenko [Mon, 27 Feb 2017 11:40:14 +0000 (11:40 +0000)]
[DAGCombine] NFC. MatchLoadCombine remember the first byte provider, not the load node

This refactoring will simplify the upcoming change to fix a bug in folding patterns with non-zero offsets on BE targets.

llvm-svn: 296331

5 years agoclang-format: [JS] whitespace after async in arrow functions.
Martin Probst [Mon, 27 Feb 2017 11:15:53 +0000 (11:15 +0000)]
clang-format: [JS] whitespace after async in arrow functions.

Async arrow functions should be marked with a whitespace after the async keyword, before the parameter list:
    x = async () => foo();

    x = async() => foo();

This makes it easier to tell apart an async arrow function from a call to a function called async.

Reviewers: bkramer

Subscribers: cfe-commits, klimek

Differential Revision: https://reviews.llvm.org/D30399

llvm-svn: 296330

5 years agoLog: Fix a regression in handling log options
Pavel Labath [Mon, 27 Feb 2017 11:05:39 +0000 (11:05 +0000)]
Log: Fix a regression in handling log options

The channel refactor introduced a regression where we were not honoring
the log options passed when enabling the channel. Fix that and add a

llvm-svn: 296329

5 years agoSwitch SBBreakpoint to storing a weak_ptr of the internal breakpoint object
Pavel Labath [Mon, 27 Feb 2017 11:05:34 +0000 (11:05 +0000)]
Switch SBBreakpoint to storing a weak_ptr of the internal breakpoint object

There is nothing we can do with the breakpoint once the associated
target becomes deleted. This will make sure we don't hold on to more
resources than we need in this case. In particular, this fixes the case
TestStepOverBreakpoint on windows, where a lingering SBBreakpoint object
causes us to nor unmap the executable file from memory.

Reviewers: clayborg, jingham

Subscribers: lldb-commits

Differential Revision: https://reviews.llvm.org/D30249

llvm-svn: 296328

5 years agoAArch64AsmParser: don't try to parse “[1]” for non-vector register operands
Sjoerd Meijer [Mon, 27 Feb 2017 10:51:11 +0000 (10:51 +0000)]
AArch64AsmParser: don't try to parse “[1]” for non-vector register operands

There are no instructions that have "[1]" as part of the assembly string;
FMOVXDhighr is out of date. This removes dead code.

Differential Revision: https://reviews.llvm.org/D30165

llvm-svn: 296327

5 years ago[analyzer] clarify 'result is garbage value' when it is out of bounds
Daniel Marjamaki [Mon, 27 Feb 2017 10:44:24 +0000 (10:44 +0000)]
[analyzer] clarify 'result is garbage value' when it is out of bounds

Differential Revision: https://reviews.llvm.org/D28278

llvm-svn: 296326

5 years agoDisable the parallel code generation in case of extension nodes
Roman Gareev [Mon, 27 Feb 2017 08:03:11 +0000 (08:03 +0000)]
Disable the parallel code generation in case of extension nodes

We can not perform the dependence analysis and, consequently, the parallel
code generation in case the schedule tree contains extension nodes.

Reviewed-by: Tobias Grosser <tobias@grosser.es>
Differential Revision: https://reviews.llvm.org/D30394

llvm-svn: 296325

5 years ago[AMDGPU] Runtime metadata fixes:
Konstantin Zhuravlyov [Mon, 27 Feb 2017 07:55:17 +0000 (07:55 +0000)]
[AMDGPU] Runtime metadata fixes:
  - Verify that runtime metadata is actually valid runtime metadata when assembling, otherwise we could accept the following when assembling, but ocl runtime will reject it:
    { amd.MDVersion: [ 2, 1 ], amd.RandomUnknownKey, amd.IsaInfo: ...
  - Make IsaInfo optional, and always emit it.

Differential Revision: https://reviews.llvm.org/D30349

llvm-svn: 296324

5 years agollvm-mc-fuzzer: add support for assembly
Brian Cain [Mon, 27 Feb 2017 06:22:17 +0000 (06:22 +0000)]
llvm-mc-fuzzer: add support for assembly

This creates an llvm-mc-disassemble-fuzzer from the existing llvm-mc-fuzzer
and finishing the assemble support in llvm-mc-assemble-fuzzer.

llvm-svn: 296323

5 years ago[APInt] Use UINT64_MAX instead of ~integerPart(0). NFC
Craig Topper [Mon, 27 Feb 2017 06:05:33 +0000 (06:05 +0000)]
[APInt] Use UINT64_MAX instead of ~integerPart(0). NFC

llvm-svn: 296322

5 years ago[X86] Check for less than 0 rather than explicit compare with -1. NFC
Craig Topper [Mon, 27 Feb 2017 06:05:30 +0000 (06:05 +0000)]
[X86] Check for less than 0 rather than explicit compare with -1. NFC

llvm-svn: 296321

5 years ago[GeneratePCHAction] If preprocessor option 'AllowPCHWithCompilerErrors' is enabled...
Argyrios Kyrtzidis [Mon, 27 Feb 2017 03:52:36 +0000 (03:52 +0000)]
[GeneratePCHAction] If preprocessor option 'AllowPCHWithCompilerErrors' is enabled, don't delete the produced PCH file if error diagnostics occurred.

llvm-svn: 296320

5 years agoSimplify sortMipsSymbols function a bit.
Rui Ueyama [Mon, 27 Feb 2017 03:31:38 +0000 (03:31 +0000)]
Simplify sortMipsSymbols function a bit.

llvm-svn: 296319

5 years agoAdd comments to SymbolTableSection.
Rui Ueyama [Mon, 27 Feb 2017 03:31:19 +0000 (03:31 +0000)]
Add comments to SymbolTableSection.

llvm-svn: 296318

5 years agoRevert "[analyzer] NFC: Update test infrastructure to support multiple constraint...
Dominic Chen [Mon, 27 Feb 2017 03:29:25 +0000 (03:29 +0000)]
Revert "[analyzer] NFC: Update test infrastructure to support multiple constraint managers"

This reverts commit 8e7780b9e59ddaad1800baf533058d2c064d4787.

llvm-svn: 296317

5 years agoRemove dead function.
Rui Ueyama [Mon, 27 Feb 2017 03:13:36 +0000 (03:13 +0000)]
Remove dead function.

llvm-svn: 296316

5 years agoRemove unnecessary "this->".
Rui Ueyama [Mon, 27 Feb 2017 03:10:06 +0000 (03:10 +0000)]
Remove unnecessary "this->".

llvm-svn: 296315

5 years agoRename SyntheticSection::finalize -> finalizeContents.
Rui Ueyama [Mon, 27 Feb 2017 03:07:41 +0000 (03:07 +0000)]
Rename SyntheticSection::finalize -> finalizeContents.

In LLD source code, too many functions are called "finalize", although
what they do are different. This patch gives it a better name.

llvm-svn: 296314

5 years agoDe-template SyntheticSection.
Rui Ueyama [Mon, 27 Feb 2017 02:56:02 +0000 (02:56 +0000)]
De-template SyntheticSection.

This class didn't use ELFT.

llvm-svn: 296313

5 years ago[analyzer] NFC: Update test infrastructure to support multiple constraint managers
Dominic Chen [Mon, 27 Feb 2017 02:36:15 +0000 (02:36 +0000)]
[analyzer] NFC: Update test infrastructure to support multiple constraint managers

Summary: Replace calls to %clang/%clang_cc1 with %clang_analyze_cc1 when invoking static analyzer, and perform runtime substitution to select the appropriate constraint manager, per D28952.

Reviewers: xazax.hun, NoQ, zaks.anna, dcoughlin

Subscribers: mgorny, rgov, mikhail.ramalho, a.sidorin, cfe-commits

Differential Revision: https://reviews.llvm.org/D30373

llvm-svn: 296312

5 years agoDe-template InterpSection because it doesn't use ELFT.
Rui Ueyama [Mon, 27 Feb 2017 02:32:49 +0000 (02:32 +0000)]
De-template InterpSection because it doesn't use ELFT.

llvm-svn: 296311

5 years agoUpdate comments. Now thunks are synthetic sections.
Rui Ueyama [Mon, 27 Feb 2017 02:32:29 +0000 (02:32 +0000)]
Update comments. Now thunks are synthetic sections.

llvm-svn: 296310

5 years agoMove SymbolTable<ELFT>::Sections out of the class.
Rui Ueyama [Mon, 27 Feb 2017 02:32:08 +0000 (02:32 +0000)]
Move SymbolTable<ELFT>::Sections out of the class.

The list of all input sections was defined in SymbolTable class for a
historical reason. The list itself is not a template. However, because
SymbolTable class is a template, we needed to pass around ELFT to access
the list. This patch moves the list out of the class so that it doesn't
need ELFT.

llvm-svn: 296309

5 years agoDe-template OutputSectionFactory.
Rui Ueyama [Mon, 27 Feb 2017 02:31:48 +0000 (02:31 +0000)]
De-template OutputSectionFactory.

Since OutputSection is no longer a template, it doesn't make much
sense to tempalte its factory class.

llvm-svn: 296308

5 years agoRemove useless template so that Out<ELFT> becomes just Out.
Rui Ueyama [Mon, 27 Feb 2017 02:31:26 +0000 (02:31 +0000)]
Remove useless template so that Out<ELFT> becomes just Out.

llvm-svn: 296307

5 years agoAdd a cc1 flag for setting the existing Preprocessor option 'AllowPCHWithCompilerErrors'.
Argyrios Kyrtzidis [Mon, 27 Feb 2017 02:06:18 +0000 (02:06 +0000)]
Add a cc1 flag for setting the existing Preprocessor option 'AllowPCHWithCompilerErrors'.

llvm-svn: 296306

5 years agoDo full codegen for various tests. NFC
Amaury Sechet [Mon, 27 Feb 2017 01:15:57 +0000 (01:15 +0000)]
Do full codegen for various tests. NFC

llvm-svn: 296305

5 years agoRemove an obsolete/duplicate part of a document.
Rui Ueyama [Mon, 27 Feb 2017 00:11:25 +0000 (00:11 +0000)]
Remove an obsolete/duplicate part of a document.

llvm-svn: 296304

5 years agoDe-template SharedSymbol.
Rui Ueyama [Sun, 26 Feb 2017 23:35:34 +0000 (23:35 +0000)]
De-template SharedSymbol.

Differential Revision: https://reviews.llvm.org/D30351

llvm-svn: 296303

5 years agoFix rst markup.
Rui Ueyama [Sun, 26 Feb 2017 22:17:46 +0000 (22:17 +0000)]
Fix rst markup.

llvm-svn: 296302

5 years ago[APInt] Use UINT64_MAX instead of ~uint64_t(0ULL). NFC
Craig Topper [Sun, 26 Feb 2017 21:15:18 +0000 (21:15 +0000)]
[APInt] Use UINT64_MAX instead of ~uint64_t(0ULL). NFC

llvm-svn: 296301

5 years ago[APInt] Use UINT64_MAX instead of ~0ULL. NFC
Craig Topper [Sun, 26 Feb 2017 19:28:48 +0000 (19:28 +0000)]
[APInt] Use UINT64_MAX instead of ~0ULL. NFC

llvm-svn: 296300

5 years ago[APInt] Remove unnecessary early out from getLowBitsSet. The same case is handled...
Craig Topper [Sun, 26 Feb 2017 19:28:45 +0000 (19:28 +0000)]
[APInt] Remove unnecessary early out from getLowBitsSet. The same case is handled equally well by the next check.

llvm-svn: 296299

5 years agoUpdate comments. NFCI
Xin Tong [Sun, 26 Feb 2017 19:08:44 +0000 (19:08 +0000)]
Update comments. NFCI

llvm-svn: 296298

5 years agoFix typo.
Rui Ueyama [Sun, 26 Feb 2017 18:32:31 +0000 (18:32 +0000)]
Fix typo.

Pointed out by Piotr Padlewski.

llvm-svn: 296297

5 years ago[X86] DAZ Macros Relocation
Oren Ben Simhon [Sun, 26 Feb 2017 11:58:15 +0000 (11:58 +0000)]
[X86] DAZ Macros Relocation

The DAZ feature introduces the denormal zero support for x86.
Currently the definitions are located under SSE3 header, however there are some SSE2 targets that support the feature as well.

Differential Revision: https://reviews.llvm.org/D30194

llvm-svn: 296296

5 years agoRevert "[CGP] Split some critical edges coming out of indirect branches"
Daniel Jasper [Sun, 26 Feb 2017 11:09:12 +0000 (11:09 +0000)]
Revert "[CGP] Split some critical edges coming out of indirect branches"

This reverts commit r296149 as it leads to crashes when compiling for

llvm-svn: 296295

5 years ago[LoopDeletion] Modernize and simplify a bit. NFCI.
Davide Italiano [Sun, 26 Feb 2017 07:08:20 +0000 (07:08 +0000)]
[LoopDeletion] Modernize and simplify a bit. NFCI.

llvm-svn: 296294

5 years ago[X86] Fix execution domain for cmpss/sd instructions.
Craig Topper [Sun, 26 Feb 2017 06:45:59 +0000 (06:45 +0000)]
[X86] Fix execution domain for cmpss/sd instructions.

llvm-svn: 296293

5 years ago[AVX-512] Fix execution domain for scalar commutable min/max instructions.
Craig Topper [Sun, 26 Feb 2017 06:45:56 +0000 (06:45 +0000)]
[AVX-512] Fix execution domain for scalar commutable min/max instructions.

llvm-svn: 296292

5 years ago[AVX-512] Fix execution domain for vmovhpd/lpd/hps/lps.
Craig Topper [Sun, 26 Feb 2017 06:45:54 +0000 (06:45 +0000)]
[AVX-512] Fix execution domain for vmovhpd/lpd/hps/lps.

llvm-svn: 296291

5 years ago[AVX-512] Fix the execution domain for AVX-512 integer broadcasts.
Craig Topper [Sun, 26 Feb 2017 06:45:51 +0000 (06:45 +0000)]
[AVX-512] Fix the execution domain for AVX-512 integer broadcasts.

llvm-svn: 296290

5 years ago[AVX-512] Disable the redundant patterns in the VPBROADCASTBr_Alt and VPBROADCASTWr_A...
Craig Topper [Sun, 26 Feb 2017 06:45:48 +0000 (06:45 +0000)]
[AVX-512] Disable the redundant patterns in the VPBROADCASTBr_Alt and VPBROADCASTWr_Alt instructions. NFC

llvm-svn: 296289

5 years ago[AVX-512] Fix execution domain for VPMADD52 instructions.
Craig Topper [Sun, 26 Feb 2017 06:45:45 +0000 (06:45 +0000)]
[AVX-512] Fix execution domain for VPMADD52 instructions.

llvm-svn: 296288

5 years ago[AVX-512] Use update_llc_test_checks.py to regenerate a test.
Craig Topper [Sun, 26 Feb 2017 06:45:43 +0000 (06:45 +0000)]
[AVX-512] Use update_llc_test_checks.py to regenerate a test.

llvm-svn: 296287

5 years ago[AVX-512] Fix the execution domain for VSCALEF instructions.
Craig Topper [Sun, 26 Feb 2017 06:45:40 +0000 (06:45 +0000)]
[AVX-512] Fix the execution domain for VSCALEF instructions.

llvm-svn: 296286

5 years ago[AVX-512] Fix execution domain of scalar VRANGE/REDUCE/GETMANT with sae.
Craig Topper [Sun, 26 Feb 2017 06:45:37 +0000 (06:45 +0000)]
[AVX-512] Fix execution domain of scalar VRANGE/REDUCE/GETMANT with sae.

llvm-svn: 296285

5 years ago[X86] Fix the execution domain for scalar SQRT intrinsic instruction.
Craig Topper [Sun, 26 Feb 2017 06:45:35 +0000 (06:45 +0000)]
[X86] Fix the execution domain for scalar SQRT intrinsic instruction.

llvm-svn: 296284

5 years ago[X86] Add an additional CHECK prefix to a test. Some of the cases used it, but it...
Craig Topper [Sun, 26 Feb 2017 06:45:32 +0000 (06:45 +0000)]
[X86] Add an additional CHECK prefix to a test. Some of the cases used it, but it wasn't on the FileCheck command lines.

llvm-svn: 296283

5 years ago[index] Add 'Parameter' symbol kind and 'Local' symbol property to distinguish functi...
Argyrios Kyrtzidis [Sun, 26 Feb 2017 05:37:56 +0000 (05:37 +0000)]
[index] Add 'Parameter' symbol kind and 'Local' symbol property to distinguish function-local symbols

Parameters have a 'child' relation to their function/method.
Also add an option '-include-locals' to 'c-index-test core' to enable indexing of function-local symbols.

Original patch from Nathan Hawes with some changes by me.

llvm-svn: 296282

5 years ago[SCCP] Remove manual folding of terminator instructions.
Xin Tong [Sun, 26 Feb 2017 02:11:24 +0000 (02:11 +0000)]
[SCCP] Remove manual folding of terminator instructions.

BranchInst, SwitchInst (with non-default case) with Undef as input is not
possible at this point. As we always default-fold terminator to one target in
ResolvedUndefsIn and set the input accordingly.

So we should only have constantint/blockaddress here.

If ConstantFoldTerminator fails, that could mean 2 things.

1. ConstantFoldTerminator is doing something unexpected, i.e. not folding on constantint
or blockaddress and not making blocks that should be dead dead.
2. This is not a terminator on constantint or blockaddress. Its on a constant or
overdefined, then this block should not be dead.

In both cases, we should assert.

Reviewers: davide, efriedma, sanjoy

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D30381

llvm-svn: 296281

5 years ago[X86] Clean up test/CodeGen/X86/2006-03-02-InstrSchedBug.ll
David L. Jones [Sun, 26 Feb 2017 01:32:35 +0000 (01:32 +0000)]
[X86] Clean up test/CodeGen/X86/2006-03-02-InstrSchedBug.ll

Migrated from grep to FileCheck.
Re-indented code, removed boilerplate comments.
Added 'entry' label at beginning of basic block.

Patch by Jorge Gorbe!

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D30320

llvm-svn: 296280

5 years agoRevert "In visitSTORE, always use FindBetterChain, rather than only when UseAA is...
Nirav Dave [Sun, 26 Feb 2017 01:27:32 +0000 (01:27 +0000)]
Revert "In visitSTORE, always use FindBetterChain, rather than only when UseAA is enabled."

This reverts commit r296252 until 256-bit operations are more efficiently generated in X86.

llvm-svn: 296279

5 years agoAdd a section about how to use ld.lld.
Rui Ueyama [Sun, 26 Feb 2017 00:20:42 +0000 (00:20 +0000)]
Add a section about how to use ld.lld.

llvm-svn: 296278

5 years agovec perm can go down either pipeline on P8.
Eric Christopher [Sun, 26 Feb 2017 00:11:58 +0000 (00:11 +0000)]
vec perm can go down either pipeline on P8.
No observable changes, spotted while looking at the scheduling description.

llvm-svn: 296277

5 years agoUpdate cxx_dr_status page.
Richard Smith [Sat, 25 Feb 2017 23:54:18 +0000 (23:54 +0000)]
Update cxx_dr_status page.

llvm-svn: 296276

5 years agoC++ DR1611, 1658, 2180: implement "potentially constructed subobject" rules for speci...
Richard Smith [Sat, 25 Feb 2017 23:53:05 +0000 (23:53 +0000)]
C++ DR1611, 1658, 2180: implement "potentially constructed subobject" rules for special member functions.

Essentially, as a base class constructor does not construct virtual bases, such
a constructor for an abstract class does not need the corresponding base class
construction to be valid, and likewise for destructors.

This creates an awkward situation: clang will sometimes generate references to
the complete object and deleting destructors for an abstract class (it puts
them in the construction vtable for a derived class). But we can't generate a
"correct" version of these because we can't generate references to base class
constructors any more (if they're template specializations, say, we might not
have instantiated them and can't assume any other TU will emit a copy).
Fortunately, we don't need to, since no correct program can ever invoke them,
so instead emit symbols that just trap.

We should stop emitting references to these symbols, but still need to emit
definitions for compatibility.

llvm-svn: 296275

5 years agoFix signed-unsigned comparison warning
Sanjoy Das [Sat, 25 Feb 2017 22:25:48 +0000 (22:25 +0000)]
Fix signed-unsigned comparison warning

llvm-svn: 296274

5 years ago[ValueTracking] Don't do an unchecked shift in ComputeNumSignBits
Sanjoy Das [Sat, 25 Feb 2017 20:30:45 +0000 (20:30 +0000)]
[ValueTracking] Don't do an unchecked shift in ComputeNumSignBits

Previously we used to return a bogus result, 0, for IR like `ashr %val,

I've also added an assert checking that `ComputeNumSignBits` at least
returns 1.  That assert found an already checked in test case where we
were returning a bad result for `ashr %val, -1`.

Fixes PR32045.

Reviewers: spatel, majnemer

Reviewed By: spatel, majnemer

Subscribers: efriedma, mcrosier, llvm-commits

Differential Revision: https://reviews.llvm.org/D30311

llvm-svn: 296273

5 years ago[APInt] Add APInt::extractBits() method to extract APInt subrange (reapplied)
Simon Pilgrim [Sat, 25 Feb 2017 20:01:58 +0000 (20:01 +0000)]
[APInt] Add APInt::extractBits() method to extract APInt subrange (reapplied)

The current pattern for extract bits in range is typically:


Which can be particularly slow for large APInts (MaskSizeInBits > 64) as they require the allocation of memory for the temporary variable.

This is another of the compile time issues identified in PR32037 (see also D30265).

This patch adds the APInt::extractBits() helper method which avoids the temporary memory allocation.

Differential Revision: https://reviews.llvm.org/D30336

llvm-svn: 296272

5 years ago[AVX-512] Fix the execution domain for scalar FMA instructions.
Craig Topper [Sat, 25 Feb 2017 19:36:28 +0000 (19:36 +0000)]
[AVX-512] Fix the execution domain for scalar FMA instructions.

llvm-svn: 296271

5 years ago[AVX-512] Fix the execution domain on some instructions.
Craig Topper [Sat, 25 Feb 2017 19:18:11 +0000 (19:18 +0000)]
[AVX-512] Fix the execution domain on some instructions.

llvm-svn: 296270

5 years ago[AVX-512] Add an additional test case to show the execution domain for vrqsrtsd is...
Craig Topper [Sat, 25 Feb 2017 19:18:08 +0000 (19:18 +0000)]
[AVX-512] Add an additional test case to show the execution domain for vrqsrtsd is wrong.

llvm-svn: 296269

5 years ago[AVX-512] Use update_llc_test_checks.py to regenerate the avx512er intrinsic test.
Craig Topper [Sat, 25 Feb 2017 19:18:04 +0000 (19:18 +0000)]
[AVX-512] Use update_llc_test_checks.py to regenerate the avx512er intrinsic test.

llvm-svn: 296268

5 years ago[test] Disable test/Index/pch-from-libclang.c for non-darwin systems.
Argyrios Kyrtzidis [Sat, 25 Feb 2017 19:17:11 +0000 (19:17 +0000)]
[test] Disable test/Index/pch-from-libclang.c for non-darwin systems.

llvm-svn: 296267

5 years agoreenable accidentally disabled test NFC.
Nirav Dave [Sat, 25 Feb 2017 19:11:53 +0000 (19:11 +0000)]
reenable accidentally disabled test NFC.

llvm-svn: 296266

5 years ago[test] Use cc1 -triple for test/Index/pch-from-libclang.c.
Argyrios Kyrtzidis [Sat, 25 Feb 2017 18:55:32 +0000 (18:55 +0000)]
[test] Use cc1 -triple for test/Index/pch-from-libclang.c.

Note quite sure why driver -target has no effect.

llvm-svn: 296265

5 years ago[AVX-512] Remove unnecessary masked versions of VCVTSS2SD and VCVTSD2SS using the...
Craig Topper [Sat, 25 Feb 2017 18:43:42 +0000 (18:43 +0000)]
[AVX-512] Remove unnecessary masked versions of VCVTSS2SD and VCVTSD2SS using the scalar register class. We only have patterns for the masked intrinsics.

llvm-svn: 296264

5 years ago[test] Add target to test/Index/pch-from-libclang.c.
Argyrios Kyrtzidis [Sat, 25 Feb 2017 18:35:53 +0000 (18:35 +0000)]
[test] Add target to test/Index/pch-from-libclang.c.

Attempt to fix the failing bots.

llvm-svn: 296263

5 years ago[driver] Pass a resource dir without the '/../' part.
Argyrios Kyrtzidis [Sat, 25 Feb 2017 18:14:35 +0000 (18:14 +0000)]
[driver] Pass a resource dir without the '/../' part.

This get the resource dir string to match with the one from libclang (which is not adding '/../'),
and allows clang to accept a modules-enabled PCH that was created by libclang.

llvm-svn: 296262

5 years ago[modules] For -module-file-info, print out the resource dir path, since it is include...
Argyrios Kyrtzidis [Sat, 25 Feb 2017 18:14:31 +0000 (18:14 +0000)]
[modules] For -module-file-info, print out the resource dir path, since it is included in the module hash.

llvm-svn: 296261

5 years ago[ExecutionDepsFix] Don't make copies of LiveReg objects when collecting operands...
Craig Topper [Sat, 25 Feb 2017 18:12:25 +0000 (18:12 +0000)]
[ExecutionDepsFix] Don't make copies of LiveReg objects when collecting operands for soft instructions

While collecting operands we make copies of the LiveReg objects which are stored in the LiveRegs array. If the instruction uses the same register multiple times we end up with multiple copies. Later we iterate through the collected list of LiveReg objects and merge DomainValues. In the process of doing this the merge function can change the contents of the original LiveReg object in the LiveRegs array, but not the copies that have been made. So when we get to the second usage of the register we end up seeing a stale copy of the LiveReg object.

To fix this I've stopped copying and now just store a pointer to the original LiveReg object. Another option might be to avoid adding the same register to the Regs array twice, but this approach seemed simpler.

The included test case exposes this bug due to an AVX-512 masked OR instruction using the same register for the passthru operand and one of the inputs to the OR operation.

Fixes PR30284.

Reviewers: RKSimon, stoklund, MatzeB, spatel, myatsina

Reviewed By: RKSimon

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D30242

llvm-svn: 296260

5 years agoNo need to copy the variable [NFC]
Artyom Skrobov [Sat, 25 Feb 2017 17:18:09 +0000 (17:18 +0000)]
No need to copy the variable [NFC]

llvm-svn: 296259

5 years agoRevert r296215, "[PDB] General improvements to Stream library." and followings.
NAKAMURA Takumi [Sat, 25 Feb 2017 17:04:23 +0000 (17:04 +0000)]
Revert r296215, "[PDB] General improvements to Stream library." and followings.

r296215, "[PDB] General improvements to Stream library."
r296217, "Disable BinaryStreamTest.StreamReaderObject temporarily."
r296220, "Re-enable BinaryStreamTest.StreamReaderObject."
r296244, "[PDB] Disable some tests that are breaking bots."
r296249, "Add static_cast to silence -Wc++11-narrowing."

std::errc::no_buffer_space should be used for OS-oriented errors for socket transmission.
(Seek discussions around llvm/xray.)

I could substitute s/no_buffer_space/others/g, but I revert whole them ATM.

Could we define and use LLVM errors there?

llvm-svn: 296258