20 months ago[Driver] Move detectLibcxxIncludePath to ToolChain
Petr Hosek [Tue, 22 Sep 2020 08:01:16 +0000 (01:01 -0700)]
[Driver] Move detectLibcxxIncludePath to ToolChain

This helper method is useful even outside of Gnu toolchains, so move
it to ToolChain so it can be reused in other toolchains such as Fuchsia.

Differential Revision: https://reviews.llvm.org/D88452

20 months ago[libc++] Allow retries on some slightly flaky mutex tests
Louis Dionne [Fri, 2 Oct 2020 20:44:43 +0000 (16:44 -0400)]
[libc++] Allow retries on some slightly flaky mutex tests

20 months ago[Hexagon] Move selection of HVX multiply from lowering to patterns
Krzysztof Parzyszek [Thu, 1 Oct 2020 16:01:07 +0000 (11:01 -0500)]
[Hexagon] Move selection of HVX multiply from lowering to patterns

Also, change i32*i32 to V6_vmpyieoh + V6_vmpyiewuh_acc, which works
on V60 as well.

20 months ago[llvm-objcopy][NFC] refactor error handling. part 3.
Alexey Lapshin [Sat, 19 Sep 2020 15:53:44 +0000 (18:53 +0300)]
[llvm-objcopy][NFC] refactor error handling. part 3.

Remove usages of special error reporting functions(error(),
reportError()). Errors are reported as Expected<>/Error returning
values. This part is for ELF subfolder of llvm-objcopy.

Testing: check-all.

Differential Revision: https://reviews.llvm.org/D87987

20 months agoRelease the shadow memory used by the mmap range at munmap
Jianzhou Zhao [Thu, 1 Oct 2020 18:05:34 +0000 (18:05 +0000)]
Release the shadow memory used by the mmap range at munmap

When an application does a lot of pairs of mmap and munmap, if we did
not release shadoe memory used by mmap addresses, this would increase
memory usage.

Reviewed-by: morehouse
Differential Revision: https://reviews.llvm.org/D88686

20 months ago[flang][NFC] Fix mis-matched struct/class declarations
Tim Keith [Fri, 2 Oct 2020 20:08:49 +0000 (13:08 -0700)]
[flang][NFC] Fix mis-matched struct/class declarations

The template `ListDirectedStatementState` was declared as a struct and then as a class.
Fix it so they match.

Differential Revision: https://reviews.llvm.org/D88711

20 months ago[lldb] Add a "design" section to the documentation.
Jonas Devlieghere [Fri, 2 Oct 2020 19:56:38 +0000 (12:56 -0700)]
[lldb] Add a "design" section to the documentation.

Create a "Design" section for the LLDB documentation. The goal is to
have design documents that describe how the LLDB internals work.

Currently similar pages  are mixed together under the "Development". The
existing pages describing the architecture, the reproducers, the
structured data plugins, and the SB API could be housed here. I hope
we'd see more pages being added here in the future.

Differential revision: https://reviews.llvm.org/D88516

20 months ago[MemCpyOpt] Add helper to erase instructions (NFC)
Nikita Popov [Fri, 2 Oct 2020 18:42:22 +0000 (20:42 +0200)]
[MemCpyOpt] Add helper to erase instructions (NFC)

Next to erasing the instruction, we also always want to remove
it from MSSA and MD. Use a common function to do so.

This is a refactoring split out from D26739.

20 months ago[MemCpyOpt] Avoid double invalidation (NFCI)
Nikita Popov [Fri, 2 Oct 2020 19:47:03 +0000 (21:47 +0200)]
[MemCpyOpt] Avoid double invalidation (NFCI)

The removal of the cpy instruction is left to the caller of
performCallSlotOptzn(), including the invalidation of MD. Both
call-sites already do this.

Also handle incrementation of NumMemCpyInstr consistently at the
call-site. One of the call-site was already doing this, which
ended up incrementing the statistic twice.

This fix was part of D26739.

20 months agoRelax newly added opcode alias check to check only for a number instead of a specific...
Douglas Yung [Fri, 2 Oct 2020 19:13:51 +0000 (12:13 -0700)]
Relax newly added opcode alias check to check only for a number instead of a specific opcode.

20 months ago[MLIR][SPIRV] Add initial support for OpSpecConstantComposite.
ergawy [Fri, 2 Oct 2020 18:56:17 +0000 (14:56 -0400)]
[MLIR][SPIRV] Add initial support for OpSpecConstantComposite.

This commit adds support to SPIR-V's composite specialization constants.
These are specialization constants which are composed of other spec
constants (whehter scalar or composite), regular constatns, or undef

This commit adds support for parsing, printing, verification, and

A few TODOs are still in order:
- Supporting more types of constituents; currently, only scalar spec constatns are supported.
- Extending `spv._reference_of` to support composite spec constatns.

Reviewed By: antiagainst

Differential Revision: https://reviews.llvm.org/D88568

20 months ago[libc++] NFCI: Remove the _LIBCPP_DEBUG_MODE helper macro
Louis Dionne [Fri, 2 Oct 2020 19:07:40 +0000 (15:07 -0400)]
[libc++] NFCI: Remove the _LIBCPP_DEBUG_MODE helper macro

It was used inconsistently and the name was pretty confusing, so we might
as well use `#if _LIBCPP_DEBUG_LEVEL == 2` consistently everywhere.

20 months ago[libc++] NFCI: Simplify macro definitions for the debug mode
Louis Dionne [Fri, 2 Oct 2020 19:02:52 +0000 (15:02 -0400)]
[libc++] NFCI: Simplify macro definitions for the debug mode

The debug mode always had three possibilities:
- _LIBCPP_DEBUG is undefined => no assertions
- _LIBCPP_DEBUG == 0         => some assertions
- _LIBCPP_DEBUG == 1         => some assertions + iterator checks

This was documented that way, however the code did not make this clear
at all. The discrepancy between _LIBCPP_DEBUG and _LIBCPP_DEBUG_LEVEL
was especially confusing. I reworked how the various macros are defined
without changing anything else to make the code clearer.

20 months ago[docs] Update ControlFlowIntegrity.rst.
Evgenii Stepanov [Tue, 15 Sep 2020 19:49:18 +0000 (12:49 -0700)]
[docs] Update ControlFlowIntegrity.rst.

Expand the list of targets that support cfi-icall.
Add ThinLTO everywhere LTO is mentioned. AFAIK all CFI features are
supported with ThinLTO.

Differential Revision: https://reviews.llvm.org/D87717

20 months ago[llc] Initialize TargetOptions after Triple is available
Fangrui Song [Fri, 2 Oct 2020 18:43:17 +0000 (11:43 -0700)]
[llc] Initialize TargetOptions after Triple is available

Some targets have different defaults. This patch defers initialization of `TargetOptions` so that a future patch can pass `TargetOptions` to `InitTargetOptionsFromCodeGenFlags`

Reviewed By: jasonliu

Differential Revision: https://reviews.llvm.org/D88748

20 months agoUpdate legalizer-info-validation.mir test to test all opcodes.
Amara Emerson [Fri, 2 Oct 2020 18:26:22 +0000 (11:26 -0700)]
Update legalizer-info-validation.mir test to test all opcodes.

The test doesn't fail if we add opcodes to the end of the opcodes definition
list, so we were missing some.

20 months ago[libc++] NFCI: Remove _LIBCPP_EXTERN_TEMPLATE2
Louis Dionne [Fri, 2 Oct 2020 18:29:48 +0000 (14:29 -0400)]

This seems to have been added a long time ago as a temporary help
for debugging some <regex> issue, but it's really the same as

20 months ago[MemCpyOpt] Add tests from D40802 (NFC)
Nikita Popov [Fri, 2 Oct 2020 17:16:37 +0000 (19:16 +0200)]
[MemCpyOpt] Add tests from D40802 (NFC)

Even though that patch didn't stick, we should retain the test

20 months ago[DAE] MarkLive in MarkValue(MaybeLive) if any use is live
Arthur Eubanks [Wed, 30 Sep 2020 05:29:26 +0000 (22:29 -0700)]
[DAE] MarkLive in MarkValue(MaybeLive) if any use is live

While looping through all args or all return values, we may mark a use
of a later iteration as live. Previously when we got to that later value
it would ignore that and continue adding to Uses instead of marking it
live. For example, when looping through arg#0 and arg#1,
MarkValue(arg#0, Live) may cause some use of arg#1 to be live, but
MarkValue(arg#1, MaybeLive) will not notice that and continue adding
into Uses.

Now MarkValue(RA, MaybeLive) will MarkLive(RA) if any use is live.

Fixes PR47444.

Reviewed By: rnk

Differential Revision: https://reviews.llvm.org/D88529

20 months agoscudo: Simplify AtomicOptions::setFillContentsMode. NFCI.
Peter Collingbourne [Fri, 2 Oct 2020 17:20:31 +0000 (10:20 -0700)]
scudo: Simplify AtomicOptions::setFillContentsMode. NFCI.

Differential Revision: https://reviews.llvm.org/D88747

20 months agoReland [AlwaysInliner] Update BFI when inlining
Arthur Eubanks [Fri, 25 Sep 2020 17:59:20 +0000 (10:59 -0700)]
Reland [AlwaysInliner] Update BFI when inlining

Reviewed By: davidxl

Differential Revision: https://reviews.llvm.org/D88324

20 months ago[gn build] Don't define CINDEX_EXPORTS
Arthur Eubanks [Fri, 2 Oct 2020 17:31:56 +0000 (10:31 -0700)]
[gn build] Don't define CINDEX_EXPORTS

This causes
../../clang/include\clang-c/Platform.h(23,11): warning: 'CINDEX_EXPORTS' macro redefined [-Wmacro-redefined]

20 months agoRevert "[AlwaysInliner] Update BFI when inlining"
Arthur Eubanks [Fri, 2 Oct 2020 17:34:51 +0000 (10:34 -0700)]
Revert "[AlwaysInliner] Update BFI when inlining"

This reverts commit b1bf24667fc3ec5dc4b541148d0d722ffa28a6df.

20 months ago[AlwaysInliner] Update BFI when inlining
Arthur Eubanks [Fri, 25 Sep 2020 17:59:20 +0000 (10:59 -0700)]
[AlwaysInliner] Update BFI when inlining

Reviewed By: davidxl

Differential Revision: https://reviews.llvm.org/D88324

20 months agoRevert rG3d14a1e982ad27 - "[InstCombine] recognizeBSwapOrBitReverseIdiom - support...
Simon Pilgrim [Fri, 2 Oct 2020 17:16:55 +0000 (18:16 +0100)]
Revert rG3d14a1e982ad27 - "[InstCombine] recognizeBSwapOrBitReverseIdiom - support for 'partial' bswap patterns (PR47191)"

This reverts commit 3d14a1e982ad27111346471564d575ad5efc6419.

This is breaking on some 2stage clang buildbots

20 months ago[mlir][vector] Add canonicalization patterns for extractMap/insertMap
Thomas Raoux [Fri, 2 Oct 2020 17:11:22 +0000 (10:11 -0700)]
[mlir][vector] Add canonicalization patterns for extractMap/insertMap

Add basic canonicalization patterns for the extractMap/insertMap to allow them
to be folded into Transfer ops.
Also mark transferRead as memory read so that it can be removed by dead code.

Differential Revision: https://reviews.llvm.org/D88622

20 months ago[InstCombine] Add trunc(bswap(trunc/zext(x))) vector tests
Simon Pilgrim [Fri, 2 Oct 2020 17:04:56 +0000 (18:04 +0100)]
[InstCombine] Add trunc(bswap(trunc/zext(x))) vector tests

20 months ago[libc++] Remove unnecessary usage of <iostream> in the test suite
Louis Dionne [Mon, 21 Sep 2020 21:08:53 +0000 (17:08 -0400)]
[libc++] Remove unnecessary usage of <iostream> in the test suite

Tests should strive to be as minimal as possible, since it makes them
relevant on platforms where <iostream> does not work.

20 months ago[lldb] Fix bug in fallback logic for finding the resource directory.
Jonas Devlieghere [Fri, 2 Oct 2020 16:53:30 +0000 (09:53 -0700)]
[lldb] Fix bug in fallback logic for finding the resource directory.

Both of the if-clauses modify the raw_path variable and only one of them
was resetting the variable for the fallback. Avoid future bugs like that
by always resetting the variable.

Differential revision: https://reviews.llvm.org/D88704

20 months ago[VPlan] Use isa<> instead of directly checking VPRecipeID (NFC).
Florian Hahn [Fri, 2 Oct 2020 16:36:22 +0000 (17:36 +0100)]
[VPlan] Use isa<> instead of directly checking VPRecipeID (NFC).

getVPRecipeID is intended to be only used in `classof` helpers. Instead
of checking it directly, use isa<> with the correct recipe type.

20 months ago[MemCpyOpt] Regnerate test checks (NFC)
Nikita Popov [Thu, 1 Oct 2020 20:42:14 +0000 (22:42 +0200)]
[MemCpyOpt] Regnerate test checks (NFC)

20 months ago[mlir] Add Float Attribute, Integer Attribute and Bool Attribute subclasses to python...
zhanghb97 [Wed, 30 Sep 2020 06:11:46 +0000 (14:11 +0800)]
[mlir] Add Float Attribute, Integer Attribute and Bool Attribute subclasses to python bindings.

Based on PyAttribute and PyConcreteAttribute classes, this patch implements the bindings of Float Attribute, Integer Attribute and Bool Attribute subclasses.
This patch also defines the `mlirFloatAttrDoubleGetChecked` C API which is bound with the `FloatAttr.get_typed` python method.

Differential Revision: https://reviews.llvm.org/D88531

20 months ago[MLIR] Better message for FuncOp type mismatch
Stephen Neuendorffer [Thu, 30 Jul 2020 21:47:42 +0000 (14:47 -0700)]
[MLIR] Better message for FuncOp type mismatch

Previously the actual types were not shown, which makes the message
difficult to grok in the context of long lowering chains.  Also, it
appears that there were no actual tests for this.

Differential Revision: https://reviews.llvm.org/D88318

20 months ago[CostModel] move default handling after switch; NFC
Sanjay Patel [Fri, 2 Oct 2020 16:24:02 +0000 (12:24 -0400)]
[CostModel] move default handling after switch; NFC

We will need to add intrinsics to the switch (such as
the ones that are currently in the switch above this
one) that deal with special cases and then break to
the default handling.

20 months agoRevert "[WebAssembly] Emulate v128.const efficiently"
Stella Stamenova [Fri, 2 Oct 2020 16:26:21 +0000 (09:26 -0700)]
Revert "[WebAssembly] Emulate v128.const efficiently"

This reverts commit 542523a61a21c13e7f244bcf821b0fdeb8c6bb24.

20 months ago[InstCombine] recognizeBSwapOrBitReverseIdiom - support for 'partial' bswap patterns...
Simon Pilgrim [Fri, 2 Oct 2020 16:15:32 +0000 (17:15 +0100)]
[InstCombine] recognizeBSwapOrBitReverseIdiom - support for 'partial' bswap patterns (PR47191)

If we're bswap'ing some bytes and zero'ing the remainder we can perform this as a bswap+mask which helps us match 'partial' bswaps as a first step towards folding into a more complex bswap pattern.

Differential Revision: https://reviews.llvm.org/D88578

20 months agoTruncInstCombine.cpp - fix header include ordering to fix llvm-include-order clang...
Simon Pilgrim [Fri, 2 Oct 2020 14:30:48 +0000 (15:30 +0100)]
TruncInstCombine.cpp - fix header include ordering to fix llvm-include-order clang-tidy warning. NFCI.

20 months agoTruncInstCombine.cpp - use auto * to fix llvm-qualified-auto clang-tidy warning....
Simon Pilgrim [Fri, 2 Oct 2020 14:29:21 +0000 (15:29 +0100)]
TruncInstCombine.cpp - use auto * to fix llvm-qualified-auto clang-tidy warning. NFCI.

20 months ago[AArch64] Generate dot for v16i8 sum reduction to i32
Vinay Madhusudan [Fri, 2 Oct 2020 16:11:02 +0000 (17:11 +0100)]
[AArch64] Generate dot for v16i8 sum reduction to i32

Convert VECREDUCE_ADD( EXTEND(v16i8_type) ) to VECREDUCE_ADD( DOTv16i8(v16i8_type) ) whenever the result type is i32. This gains in one of the SPECCPU 2017 benchmark.

This partially solves the bug: https://bugs.llvm.org/show_bug.cgi?id=46888
Meta ticket: https://bugs.llvm.org/show_bug.cgi?id=46929

Differential Revision: https://reviews.llvm.org/D88577

20 months ago[clangd] Add bencmark for measuring latency of DecisionForest model.
Utkarsh Saxena [Wed, 30 Sep 2020 12:57:47 +0000 (14:57 +0200)]
[clangd] Add bencmark for measuring latency of DecisionForest model.

Differential Revision: https://reviews.llvm.org/D88590

20 months ago[mlir] Fix call op conversion in bare-ptr calling convention
Diego Caballero [Fri, 2 Oct 2020 15:42:13 +0000 (08:42 -0700)]
[mlir] Fix call op conversion in bare-ptr calling convention

We hit an llvm_unreachable related to unranked memrefs for call ops
with scalar types. Removing the llvm_unreachable since the conversion
should gracefully bail out in the presence of unranked memrefs. Adding
tests to verify that.

Reviewed By: ftynse

Differential Revision: https://reviews.llvm.org/D88709

20 months ago[mlir] Attempt to appease gcc-5 const char* -> StringLiteral conversion issu
Nicolas Vasilache [Fri, 2 Oct 2020 14:02:53 +0000 (10:02 -0400)]
[mlir] Attempt to appease gcc-5 const char* -> StringLiteral conversion issu

20 months agoFix interaction between stack alignment and inline-asm stack clash protection
serge-sans-paille [Thu, 23 Jul 2020 14:22:48 +0000 (16:22 +0200)]
Fix interaction between stack alignment and inline-asm stack clash protection

As reported in https://github.com/rust-lang/rust/issues/70143 alignment is not
taken into account when doing the probing. Fix that by adjusting the first probe
if the stack align is small, or by extending the dynamic probing if the
alignment is large.

Differential Revision: https://reviews.llvm.org/D84419

20 months ago[Statepoints][ISEL] visitGCRelocate: chain to current DAG root.
Denis Antrushin [Thu, 1 Oct 2020 08:09:57 +0000 (15:09 +0700)]
[Statepoints][ISEL] visitGCRelocate: chain to current DAG root.

This is similar to D87251, but for CopyFromRegs nodes.
Even for local statepoint uses we generate CopyToRegs/CopyFromRegs
nodes.  When generating CopyFromRegs in visitGCRelocate, we must chain
to current DAG root, not EntryNode, to ensure proper ordering of copy
w.r.t. statepoint node producing result for it.

Reviewed By: reames

Differential Revision: https://reviews.llvm.org/D88639

20 months agoFix failure in test hip-macros.hip
Yaxun (Sam) Liu [Fri, 2 Oct 2020 14:32:52 +0000 (10:32 -0400)]
Fix failure in test hip-macros.hip

requires amdgpu-registered-target.

20 months ago[compiler-rt] [netbsd] Improve the portability of ThreadSelfTlsTcb
Kamil Rytarowski [Fri, 2 Oct 2020 14:13:09 +0000 (16:13 +0200)]
[compiler-rt] [netbsd] Improve the portability of ThreadSelfTlsTcb

Use __lwp_gettcb_fast() and __lwp_getprivate_fast(), as _lwp_getprivate()
can be a biased pointer and invalid for use in this function on all CPUs.

20 months ago[gn build] Port 0c1bb4f8851
LLVM GN Syncbot [Fri, 2 Oct 2020 14:24:01 +0000 (14:24 +0000)]
[gn build] Port 0c1bb4f8851

20 months ago[TableGen] New backend to print detailed records.
Paul C. Anagnostopoulos [Tue, 22 Sep 2020 17:58:54 +0000 (13:58 -0400)]
[TableGen] New backend to print detailed records.
Pertinent lints are fixed.

20 months agoEmit predefined macro for wavefront size for amdgcn
Yaxun (Sam) Liu [Sun, 27 Sep 2020 02:28:04 +0000 (22:28 -0400)]
Emit predefined macro for wavefront size for amdgcn

Also fix the issue of multiple -m[no-]wavefrontsize64
options to make the last one wins.

Differential Revision: https://reviews.llvm.org/D88370

20 months ago[clangd] Extend the rename API.
Haojian Wu [Fri, 2 Oct 2020 14:01:25 +0000 (16:01 +0200)]
[clangd] Extend the rename API.

several changes:
- return a structure result in rename API;
- prepareRename now returns more information (main-file occurrences);
- remove the duplicated detecting-touch-identifier code in prepareRename (which is implemented in rename API);

Differential Revision: https://reviews.llvm.org/D88634

20 months ago[Analysis] Drop local maxAPInt/minAPInt helpers. NFCI.
Simon Pilgrim [Fri, 2 Oct 2020 13:55:53 +0000 (14:55 +0100)]
[Analysis] Drop local maxAPInt/minAPInt helpers. NFCI.

Use standard APIntOps::smax/smin helpers instead.

20 months ago[LLD] Fix /time formatting for very long runs. NFC.
Alexandre Ganea [Fri, 2 Oct 2020 13:53:43 +0000 (09:53 -0400)]
[LLD] Fix /time formatting for very long runs. NFC.

20 months ago[LLD][COFF] Add more type record information to /summary
Alexandre Ganea [Fri, 2 Oct 2020 13:36:11 +0000 (09:36 -0400)]
[LLD][COFF] Add more type record information to /summary

This adds the following two new lines to /summary:

      21351 Input OBJ files (expanded from all cmd-line inputs)
         61 PDB type server dependencies
         38 Precomp OBJ dependencies
 1420669231 Input type records         <<<<
78665073382 Input type records bytes   <<<<
    8801393 Merged TPI records
    3177158 Merged IPI records
      59194 Output PDB strings
   71576766 Global symbol records
   25416935 Module symbol records
    2103431 Public symbol records

Differential Revision: https://reviews.llvm.org/D88703

20 months ago[libc++] Move the weak symbols list to libc++abi
Louis Dionne [Thu, 1 Oct 2020 00:05:41 +0000 (20:05 -0400)]
[libc++] Move the weak symbols list to libc++abi

Those symbols are exported from libc++abi in the first place, so it
makes more sense to have them there.

20 months agoBlockFrequencyInfoImpl.h - use const references to avoid FrequencyData copies. NFCI.
Simon Pilgrim [Fri, 2 Oct 2020 12:56:13 +0000 (13:56 +0100)]
BlockFrequencyInfoImpl.h - use const references to avoid FrequencyData copies. NFCI.

20 months agoLoopAccessAnalysis.cpp - use const reference in for-range loops. NFCI.
Simon Pilgrim [Fri, 2 Oct 2020 12:53:21 +0000 (13:53 +0100)]
LoopAccessAnalysis.cpp - use const reference in for-range loops. NFCI.

20 months ago[SLP] Add test where reduction result is used in PHI.
Florian Hahn [Fri, 2 Oct 2020 12:31:23 +0000 (13:31 +0100)]
[SLP] Add test where reduction result is used in PHI.

Test case for PR47670.

20 months ago[InstCombine] Add partial bswap vector test from D88578
Simon Pilgrim [Fri, 2 Oct 2020 12:19:02 +0000 (13:19 +0100)]
[InstCombine] Add partial bswap vector test from D88578

20 months ago[AArch64] Add CPU Cortex-R82
Sjoerd Meijer [Thu, 1 Oct 2020 14:47:31 +0000 (15:47 +0100)]
[AArch64] Add CPU Cortex-R82

This adds support for -mcpu=cortex-r82. Some more information about this
core can be found here:


One note about the system register: that is a bit of a refactoring because of
small differences between v8.4-A AArch64 and v8-R AArch64.

This is based on patches from Mark Murray and Mikhail Maltsev.

Differential Revision: https://reviews.llvm.org/D88660

20 months ago[clangd] Make PopulateSwitch a fix.
Sam McCall [Fri, 2 Oct 2020 10:18:31 +0000 (12:18 +0200)]
[clangd] Make PopulateSwitch a fix.

It fixes the -Wswitch warning, though we mark it as a fix even if that is off.
This makes it the "recommended" action on an incomplete switch, which seems OK.

Differential Revision: https://reviews.llvm.org/D88726

20 months ago[PhaseOrdering] Add test that requires peeling before vectorization.
Florian Hahn [Tue, 29 Sep 2020 08:46:57 +0000 (09:46 +0100)]
[PhaseOrdering] Add test that requires peeling before vectorization.

Test case for PR47671.

20 months ago[GVN LoadPRE] Add test to show an opportunty.
Serguei Katkov [Fri, 2 Oct 2020 10:46:29 +0000 (17:46 +0700)]
[GVN LoadPRE] Add test to show an opportunty.

We can use context to prove that load can be safely executed
at a point where load is being hoisted.

20 months ago[MLIR][LLVM] Fixed `topologicalSort()` to iterative version
George Mitenkov [Fri, 2 Oct 2020 10:17:26 +0000 (13:17 +0300)]
[MLIR][LLVM] Fixed `topologicalSort()` to iterative version

Instead of recursive helper method `topologicalSortImpl()`,
sort's implementation is moved to `topologicalSort()` function's
body directly. `llvm::ReversePostOrderTraversal` is used to create
a traversal of blocks in reverse post order.

Reviewed By: kiranchandramohan, rriddle

Differential Revision: https://reviews.llvm.org/D88544

20 months ago[mlir] Add subtensor_insert operation
Nicolas Vasilache [Fri, 2 Oct 2020 10:30:56 +0000 (06:30 -0400)]
[mlir] Add subtensor_insert operation

Differential revision: https://reviews.llvm.org/D88657

20 months ago[clangd][lit] Update document-link.test to respect custom resource-dir locations
Kadir Cetinkaya [Fri, 2 Oct 2020 08:12:55 +0000 (10:12 +0200)]
[clangd][lit] Update document-link.test to respect custom resource-dir locations

Differential Revision: https://reviews.llvm.org/D88721

20 months ago[InstCombine] Add some basic vector bswap tests
Simon Pilgrim [Fri, 2 Oct 2020 10:06:39 +0000 (11:06 +0100)]
[InstCombine] Add some basic vector bswap tests

We get the vNi16 cases already via matching as a rotate followed by the fshl -> bswap combines

20 months ago[mlir] Add canonicalization for the `subtensor` op
Nicolas Vasilache [Fri, 2 Oct 2020 09:40:52 +0000 (05:40 -0400)]
[mlir] Add canonicalization for the `subtensor` op

Differential revision: https://reviews.llvm.org/D88656

20 months ago[mlir] Add a subtensor operation
Nicolas Vasilache [Fri, 2 Oct 2020 09:32:35 +0000 (05:32 -0400)]
[mlir] Add a subtensor operation

This revision introduces a `subtensor` op, which is the counterpart of `subview` for a tensor operand. This also refactors the relevant pieces to allow reusing the `subview` implementation where appropriate.

This operation will be used to implement tiling for Linalg on tensors.

20 months ago[InstCombine] Add partial bswap test from D88578
Simon Pilgrim [Fri, 2 Oct 2020 09:34:01 +0000 (10:34 +0100)]
[InstCombine] Add partial bswap test from D88578

20 months ago[ARM] Prevent constants from iCmp instruction from being hoisted if part of a min...
Meera Nakrani [Fri, 2 Oct 2020 09:28:35 +0000 (09:28 +0000)]
[ARM] Prevent constants from iCmp instruction from being hoisted if part of a min(max()) pattern

Marks constants of an ICmp instruction as free if it's only user is a select
instruction that is part of a min(max()) pattern. Ensures that in loops, in
particular when loop unrolling is turned on, SSAT will still be correctly generated.

Differential Revision: https://reviews.llvm.org/D88662

20 months ago[RISCV] Support vmsge.vx and vmsgeu.vx pseudo instructions in RVV.
Hsiangkai Wang [Tue, 28 Jul 2020 06:45:28 +0000 (14:45 +0800)]
[RISCV] Support vmsge.vx and vmsgeu.vx pseudo instructions in RVV.

Implement vmsge{u}.vx pseudo instruction.

According to RISC-V V specification, there are different scenarios for this
pseudo instruction. I list them below.

unmasked va >= x

  pseudoinstruction: vmsge{u}.vx vd, va, x
  expansion: vmslt{u}.vx vd, va, x; vmnand.mm vd, vd, vd

masked va >= x, vd != v0

  pseudoinstruction: vmsge{u}.vx vd, va, x, v0.t
  expansion: vmslt{u}.vx vd, va, x, v0.t; vmxor.mm vd, vd, v0

masked va >= x, vd == v0

  pseudoinstruction: vmsge{u}.vx vd, va, x, v0.t, vt
  expansion: vmslt{u}.vx vt, va, x;  vmandnot.mm vd, vd, vt

Use pseudo instruction to model vmsge{u}.vx. The pseudo instruction will convert
to different expansion according to the condition.

Differential Revision: https://reviews.llvm.org/D84732

20 months ago[clangd] Remove Tweak::Intent, use CodeAction kind directly. NFC
Sam McCall [Mon, 28 Sep 2020 16:12:37 +0000 (18:12 +0200)]
[clangd] Remove Tweak::Intent, use CodeAction kind directly. NFC

Intent was a nice idea but it ends up being a bit awkward/heavyweight
without adding much.

In particular, it makes it hard to implement `CodeActionParams.only` properly
(there's an inheritance hierarchy for kinds).

Differential Revision: https://reviews.llvm.org/D88427

20 months agoFix limit behavior of dynamic alloca
serge-sans-paille [Wed, 30 Sep 2020 09:35:00 +0000 (11:35 +0200)]
Fix limit behavior of dynamic alloca

When the allocation size is 0, we shouldn't probe. Within [1,  PAGE_SIZE], we
should probe once etc.

This fixes https://bugs.llvm.org/show_bug.cgi?id=47657

Differential Revision: https://reviews.llvm.org/D88548

20 months ago[yaml2obj][elf2yaml] - Add a support for the `EntSize` field for `SHT_HASH` sections.
Georgii Rymar [Thu, 1 Oct 2020 13:16:50 +0000 (16:16 +0300)]
[yaml2obj][elf2yaml] - Add a support for the `EntSize` field for `SHT_HASH` sections.

Specification  for SHT_HASH table says (https://refspecs.linuxbase.org/elf/gabi4+/ch5.dynamic.html#hash)
that it contains Elf32_Word entries for both 32/64 bit objects.

Currently both GNU linkers and LLD sets the `sh_entsize` field to `4`.

At the same time, `yaml2obj` ignores the `EntSize` field for SHT_HASH sections.
This patch fixes this and also adds a support for obj2yaml: it will not
dump this field when the `sh_entsize` contains the default value (`4`).

Differential revision: https://reviews.llvm.org/D88652

20 months agoHandle unused variable without asserts
Tres Popp [Fri, 2 Oct 2020 08:22:53 +0000 (10:22 +0200)]
Handle unused variable without asserts

20 months ago[clangd] Drop dependence on standard library in check.test
Sam McCall [Fri, 2 Oct 2020 07:53:06 +0000 (09:53 +0200)]
[clangd] Drop dependence on standard library in check.test

20 months ago[WebAssembly] Emulate v128.const efficiently
Thomas Lively [Fri, 2 Oct 2020 07:28:06 +0000 (00:28 -0700)]
[WebAssembly] Emulate v128.const efficiently

v128.const was recently implemented in V8, but until it rolls into Chrome
stable, we can't enable it in the WebAssembly backend without breaking origin
trial users. So far we have been lowering build_vectors that would otherwise
have been lowered to v128.const to splats followed by sequences of replace_lane
instructions to initialize each lane individually. That produces large and
inefficient code, so this patch introduces new logic to lower integer vector
constants to a single i64x2.splat where possible, with at most a single
i64x2.replace_lane following it if necessary.

Adapted from a patch authored by @omnisip.

Differential Revision: https://reviews.llvm.org/D88591

20 months ago[SVE][CodeGen] Fix implicit TypeSize->uint64_t casts in TypePromotion
David Sherwood [Wed, 30 Sep 2020 14:10:03 +0000 (15:10 +0100)]
[SVE][CodeGen] Fix implicit TypeSize->uint64_t casts in TypePromotion

The TypePromotion pass only operates on scalar types so I've fixed up
all places where we were relying upon the implicit cast from

Differential Revision: https://reviews.llvm.org/D88575

20 months ago[SVE][CodeGen] Add new EVT/MVT getFixedSizeInBits() functions
David Sherwood [Thu, 1 Oct 2020 11:48:07 +0000 (12:48 +0100)]
[SVE][CodeGen] Add new EVT/MVT getFixedSizeInBits() functions

When we know that a particular type is always going to be fixed
width we have so far been writing code like this:


Since we are doing this in quite a few places now it seems to make
sense to add a new helper function that allows us to replace
these calls with a single getFixedSizeInBits() call.

Differential Revision: https://reviews.llvm.org/D88649

20 months ago[AArch64] Omit SEH directives for the epilogue if none are needed
Martin Storsjö [Thu, 1 Oct 2020 07:21:24 +0000 (10:21 +0300)]
[AArch64] Omit SEH directives for the epilogue if none are needed

For these cases, we already omit the prologue directives, if
(!AFI->hasStackFrame() && !windowsRequiresStackProbe && !NumBytes).

When writing the epilogue (after the prolog has been written), if
the function doesn't have the WinCFI flag set (i.e. if no prologue
was generated), assume that no epilogue will be needed either,
and don't emit any epilog start pseudo instruction. After completing
the epilogue, make sure that it actually matched the prologue.

Previously, when epilogue start/end was generated, but no prologue,
the unwind info for such functions actually was huge; 12 bytes xdata
(4 bytes header, 4 bytes for one non-folded epilogue header, 4 bytes
for padded opcodes) and 8 bytes pdata. Because the epilog consisted of
one opcode (end) but the prolog was empty (no .seh_endprologue), the
epilogue couldn't be folded into the prologue, and thus couldn't be
considered for packed form either.

On a 6.5 MB DLL with 110 KB pdata and 166 KB xdata, this gets rid of
38 KB pdata and 62 KB xdata.

Differential Revision: https://reviews.llvm.org/D88641

20 months ago[MLIR] Updates around MemRef Normalization
Stephen Neuendorffer [Wed, 30 Sep 2020 00:14:42 +0000 (17:14 -0700)]
[MLIR] Updates around MemRef Normalization

The documentation for the NormalizeMemRefs pass and the associated MemRefsNormalizable
traits was confusing and not on the website.  This update clarifies the language
around the difference between a MemRef Type, an operation that accesses the value of
MemRef Type, and better documents the limitations of the current implementation.
This patch also includes some basic debugging information for the pass so people
might have a chance of figuring out why it doesn't work on their code.

Differential Revision: https://reviews.llvm.org/D88532

20 months ago[SCEV] Limited support for unsigned preds in isImpliedViaOperations
Max Kazantsev [Fri, 2 Oct 2020 03:20:06 +0000 (10:20 +0700)]
[SCEV] Limited support for unsigned preds in isImpliedViaOperations

The logic there only considers `SLT/SGT` predicates. We can use the same logic
for proving `ULT/UGT` predicates if all involved values are non-negative.

Adding full-scale support for unsigned might be challenging because of code amount,
so we can consider this in the future.

Differential Revision: https://reviews.llvm.org/D88087
Reviewed By: reames

20 months ago[gvn] Handle a corner case w/vectors of non-integral pointers
Philip Reames [Fri, 2 Oct 2020 02:17:21 +0000 (19:17 -0700)]
[gvn] Handle a corner case w/vectors of non-integral pointers

If we try to coerce a vector of non-integral pointers to a narrower type (either narrower vector or single pointer), we use inttoptr and violate the semantics of non-integral pointers.  In theory, we can handle many of these cases, we just need to use a different code idiom to convert without going through inttoptr and back.

This shows up as wrong code bugs, and in some cases, crashes due to failed asserts.  Modeled after a change which has lived downstream for a couple years, though completely rewritten to be more idiomatic.

20 months ago[AMDGPU] SIInsertSkips: Tidy block splitting to use splitAt
Carl Ritson [Fri, 2 Oct 2020 01:52:06 +0000 (10:52 +0900)]
[AMDGPU] SIInsertSkips: Tidy block splitting to use splitAt

Convert to use new MachineBasicBlock splitAt function.
Place code in splitBlock function for reuse in future changes.
Should yield no functional change.

Reviewed By: arsenm

Differential Revision: https://reviews.llvm.org/D88537

20 months agoHave kernel binary scanner load dSYMs as binary+dSYM if best thing found
Jason Molenda [Fri, 2 Oct 2020 01:50:29 +0000 (18:50 -0700)]
Have kernel binary scanner load dSYMs as binary+dSYM if best thing found

lldb's PlatforDarwinKernel scans the local filesystem (well known
locations, plus user-specified directories) for kernels and kexts
when doing kernel debugging, and loads them automatically.  Sometimes
kernel developers want to debug with *only* a dSYM, in which case they
give lldb the DWARF binary + the dSYM as a binary and symbol file.
This patch adds code to lldb to do this automatically if that's the
best thing lldb can find.

A few other bits of cleanup in PlatformDarwinKernel that I undertook
at the same time:

1. Remove the 'platform.plugin.darwin-kernel.search-locally-for-kexts'
setting.  When I added the local filesystem index at start of kernel
debugging, I thought people might object to the cost of the search
and want a way to disable it.  No one has.

2. Change the behavior of
'plugin.dynamic-loader.darwin-kernel.load-kexts' setting so it does
not disable the local filesystem scan, or use of the local filesystem

3. PlatformDarwinKernel::GetSharedModule into GetSharedModuleKext and
GetSharedModuleKernel for easier readability & maintenance.

4. Added accounting of .dSYM.yaa files (an archive format akin to tar)
that I come across during the scan.  I'm not using these for now; it
would be very expensive to expand the archives & see if the UUID matches
what I'm searching for.

Differential Revision: https://reviews.llvm.org/D88632

20 months agoCodeGen: Fix livein calculation in MachineBasicBlock splitAt
Carl Ritson [Fri, 2 Oct 2020 00:58:36 +0000 (09:58 +0900)]
CodeGen: Fix livein calculation in MachineBasicBlock splitAt

Fix and simplify computation of liveins for new block.

Reviewed By: arsenm

Differential Revision: https://reviews.llvm.org/D88535

20 months ago[PowerPC] Put the CR field in low bits of GRC during copying CRRC to GRC.
Esme-Yi [Fri, 2 Oct 2020 01:26:18 +0000 (01:26 +0000)]
[PowerPC] Put the CR field in low bits of GRC during copying CRRC to GRC.

Summary: How we copying the CRRC to GRC is using a single MFOCRF to copy the contents of CR field n (CR bits 4×n+32:4×n+35) into bits 4×n+32:4×n+35 of register GRC. That’s not correct because we expect the value of destination register equals to source so we have to put the the contents of CR field in the lowest 4 bits. This patch adds a RLWINM after MFOCRF to achieve that.
The problem came up when adding builtins for xvtdivdp, xvtdivsp, xvtsqrtdp, xvtsqrtsp, as posted in D88278. We need to move the outputs (in CR register) to GRC. However outputs of these instructions may not in a fixed CR# register, so we can’t directly add a rotation instruction in the .td patterns, but need to wait until the CR register is determined. Then we confirmed this should be a bug in POST-RA PSEUDO PASS.

Reviewed By: nemanjai, shchenz

Differential Revision: https://reviews.llvm.org/D88274

20 months ago[OpenMP] Add Missing Runtime Call for Globalization Remarks
Joseph Huber [Wed, 30 Sep 2020 22:22:53 +0000 (18:22 -0400)]
[OpenMP] Add Missing Runtime Call for Globalization Remarks

Add a missing runtime call to perform data globalization checks.

Reviewers: jdoerfert

Subscribers: guansong hiraditya llvm-commits sstefan1 yaxunl

Tags: #LLVM #OpenMP

Differential Revision: https://reviews.llvm.org/D88621

20 months ago[flang][openacc] Update loop construct lowering
Valentin Clement [Fri, 2 Oct 2020 00:38:48 +0000 (20:38 -0400)]
[flang][openacc] Update loop construct lowering

Update the loop construct lowering to support multiple occurences of the same clauses
such as private. Add some utility functions used by other constructs.

Upstreaming part of https://github.com/flang-compiler/f18-llvm-project/pull/438/

Reviewed By: schweitz

Differential Revision: https://reviews.llvm.org/D88253

20 months ago[flang] Extend runtime API for PAUSE to allow a stop code
peter klausler [Thu, 1 Oct 2020 19:12:46 +0000 (12:12 -0700)]
[flang] Extend runtime API for PAUSE to allow a stop code

Support integer and default character stop codes on PAUSE
statements.  Add length argument to STOP statement with a
character stop code.

Differential revision: https://reviews.llvm.org/D88692

20 months ago[flang] Fix actions at end of output record
peter klausler [Thu, 1 Oct 2020 17:59:09 +0000 (10:59 -0700)]
[flang] Fix actions at end of output record

It turns out that unformatted fixed-size output records
do need to be padded out if short, in order to avoid a
spurious EOF crash on a short record at the end of the file.
While here in AdvanceRecord(), move the unformatted
variable-length record header/footer writing code to here
from EndIoStatement().

Differential revision: https://reviews.llvm.org/D88685

20 months ago[XCOFF] Enable -fdata-sections on AIX
jasonliu [Thu, 1 Oct 2020 23:35:31 +0000 (23:35 +0000)]
[XCOFF] Enable -fdata-sections on AIX

Some design decision worth noting about:

I've noticed a recent mailing discussing about why string literal is
not affected by -fdata-sections for ELF target:

But on AIX, our linker could not split the mergeable string like other target.
So I think it would make more sense for us to emit separate csect for
every mergeable string in -fdata-sections mode,
as there might not be other ways for linker to do garbage collection
on unused mergeable string.

Reviewed By: daltenty, hubert.reinterpretcast

Differential Revision: https://reviews.llvm.org/D88339

20 months ago[flang] Fix buffering read->write transition
peter klausler [Wed, 30 Sep 2020 20:10:17 +0000 (13:10 -0700)]
[flang] Fix buffering read->write transition

The buffer needs to be Reset() after a Flush(), since the
Flush() can be a no-op after a read->write transition.
And record numbers are 1-based, not 0-based.
This fixes a bug with rewrites of records that have been
recently read.

Differential revision: https://reviews.llvm.org/D88612

20 months ago[flang][msvc] Rework a MSVC work-around to avoid clang warning
peter klausler [Thu, 1 Oct 2020 19:26:10 +0000 (12:26 -0700)]
[flang][msvc] Rework a MSVC work-around to avoid clang warning

A recent MSVC work-around patch is eliciting unused variable
warnings from clang; package the lambda reference arguments
into a struct to avoid the warning.

Differential revision: https://reviews.llvm.org/D88695

20 months ago[memcpyopt] Conservatively handle non-integral pointers
Philip Reames [Thu, 1 Oct 2020 23:44:12 +0000 (16:44 -0700)]
[memcpyopt] Conservatively handle non-integral pointers

If we allow the non-integral pointers to become memset and memcpy, we loose the ability to reason about pointer propagation.  This patch is modeled on changes we've carried downstream for a long time, figured it was worth being equally conservative for other users.  There is room to refine the semantics and handling here if anyone is motivated.

20 months ago[AArch64][SVE] Add lowering for llvm fabs
Muhammad Asif Manzoor [Thu, 1 Oct 2020 23:39:48 +0000 (19:39 -0400)]
[AArch64][SVE] Add lowering for llvm fabs

Add the functionality to lower fabs for passthru variant

Reviewed By: paulwalker-arm

Differential Revision: https://reviews.llvm.org/D88679

20 months agoFix a bug in memset formation with vectors of non-integral pointers
Philip Reames [Thu, 1 Oct 2020 23:08:44 +0000 (16:08 -0700)]
Fix a bug in memset formation with vectors of non-integral pointers

We were converting the non-integral store into a integer store which is not legal.

20 months ago[AMDGPU] Allow SOP asm mnemonic to differ
Stanislav Mekhanoshin [Thu, 1 Oct 2020 22:44:12 +0000 (15:44 -0700)]
[AMDGPU] Allow SOP asm mnemonic to differ

Allows the creation of real SOP1 instructions with
assembler mnemonics that differ from their
pseudo-instruction mnemonics. The default behavior
keeps the mnemonics matching.

Corrects a subtarget label typo in a comment.

Authored By: Joe_Nash

Differential Revision: https://reviews.llvm.org/D88708

20 months ago[flang] Readability improvement in binary->decimal conversion
peter klausler [Wed, 30 Sep 2020 19:26:25 +0000 (12:26 -0700)]
[flang] Readability improvement in binary->decimal conversion

Tweak binary->decimal conversions to avoid an integer multiplication
in a hot loop to improve readability and get a minor (~5%) speed-up.
Use native integer division by constants for more readability, too,
since current build compilers seem to optimize it correctly now.
Delete the now needless temporary work-around facility in

Differential revision: https://reviews.llvm.org/D88604

20 months ago[GlobalISel][AArch64] Don't emit cset for G_FCMPs feeding into G_BRCONDs
Jessica Paquette [Wed, 30 Sep 2020 21:01:12 +0000 (14:01 -0700)]
[GlobalISel][AArch64] Don't emit cset for G_FCMPs feeding into G_BRCONDs

Similar to the FP case in `AArch64TargetLowering::LowerBR_CC`.

Instead of emitting the csets + a tbnz, just emit a compare + bcc
(or two bccs, depending on the condition code)

This improves cases like this: https://godbolt.org/z/v8hebx

This is a 0.1% geomean code size improvement for CTMark at -O3.

Differential Revision: https://reviews.llvm.org/D88624