2 years ago[lldb/Cmake] Add a CMakeLists.txt to the utils directory...
Jonas Devlieghere [Fri, 17 Jan 2020 06:30:03 +0000 (22:30 -0800)]
[lldb/Cmake] Add a CMakeLists.txt to the utils directory...

... and include it from the main CMakeLists.txt instead of including the
utility subdirectories directly. This is consistent with the other
subdirectories and limits the scope of future changes.

2 years ago[lldb/Test] Fix API tests for mutli-config generators
Jonas Devlieghere [Fri, 17 Jan 2020 06:23:52 +0000 (22:23 -0800)]
[lldb/Test] Fix API tests for mutli-config generators

The build configuration wasn't properly substituted for the
config.lldb_executable variable. This broke when the variable was
extracted from config.dotest_args_str which was properly substituted.

2 years ago[docs][ORC] Try to fix 'title-level inconsistent' error in ORCv2.rst.
Lang Hames [Fri, 17 Jan 2020 05:46:35 +0000 (21:46 -0800)]
[docs][ORC] Try to fix 'title-level inconsistent' error in ORCv2.rst.

2 years ago[docs][ORC] Fix some RST errors in the ORCv2 doc.
Lang Hames [Fri, 17 Jan 2020 05:09:54 +0000 (21:09 -0800)]
[docs][ORC] Fix some RST errors in the ORCv2 doc.

2 years ago[Transforms][RISCV] Remove a "using namespace llvm" from an include file. Fix a place...
Craig Topper [Fri, 17 Jan 2020 04:04:42 +0000 (20:04 -0800)]
[Transforms][RISCV] Remove a "using namespace llvm" from an include file. Fix a place that became dependent on it.

This include file was created in October and has a "using namespace llvm". This seems to get exposed to other include files and finally onto cpp files. While this somewhat okay for llvm itself, its bad for other projects that use llvm as a library and includes a header file that picks this up. This was found by ISPC which has some class names at gloal scope with the same names as LLVM.

It looks like RISCV accidentally became dependent on this. I fixed it by reordering some includes in the RISCV code, but maybe we want to change the TableGenEmitter to put "namespace llvm {" in the generated file instead? But we probably want to do the simplest thing first so we can merge it to 10.0.

Differential Revision: https://reviews.llvm.org/D72895

2 years ago[lldb/CMake] Remove duplicate entry
Jonas Devlieghere [Fri, 17 Jan 2020 04:08:49 +0000 (20:08 -0800)]
[lldb/CMake] Remove duplicate entry

2 years ago[docs][ORC] Update the "utilities" section, tidy intro and fix typo.
Lang Hames [Wed, 15 Jan 2020 21:39:43 +0000 (13:39 -0800)]
[docs][ORC] Update the "utilities" section, tidy intro and fix typo.

This patch updates the formatting and language of the Features section of the
ORCv2 design document. It also fixes a TBD by adding discussion of the
absoluteSymbols, symbolAliases, and reexports utilities.

Typos found during editing were also fixed.

2 years ago[lldb/CMake] Set LLVM_HOST_TRIPLE from TARGET_TRIPLE in standalone builds.
Jonas Devlieghere [Fri, 17 Jan 2020 02:52:39 +0000 (18:52 -0800)]
[lldb/CMake] Set LLVM_HOST_TRIPLE from TARGET_TRIPLE in standalone builds.

LLVMConfig doesn't export LLVM_HOST_TRIPLE, but it sets the
TARGET_TRIPLE based on this variable. So use that again for the compiler
invocations in the shell tests.

2 years ago[lldb] add to gdb to lldb doc
Cyndy Ishida [Fri, 17 Jan 2020 03:56:04 +0000 (19:56 -0800)]
[lldb] add to gdb to lldb doc

Summary: * enabling and disabling a breakpoint were missing.

Reviewers: JDevlieghere

Reviewed By: JDevlieghere

Subscribers: merge_guards_bot, jingham, dexonsmith, ributzka, lldb-commits

Tags: #lldb

Differential Revision: https://reviews.llvm.org/D72898

2 years agoDon't dump IR output from this test to stdout.
Richard Smith [Fri, 17 Jan 2020 03:19:45 +0000 (19:19 -0800)]
Don't dump IR output from this test to stdout.

2 years agoAMDGPU: Add register classes to MUBUF load patterns
Matt Arsenault [Wed, 8 Jan 2020 19:03:45 +0000 (14:03 -0500)]
AMDGPU: Add register classes to MUBUF load patterns

2 years agoAvoid creating an immutable map in the Automaton class.
Marcello Maggioni [Tue, 14 Jan 2020 06:11:28 +0000 (22:11 -0800)]
Avoid creating an immutable map in the Automaton class.

In the DFAPacketizer we copy the Transitions array
into a map in order to later access the transitions
based on a "Current State/Action" pair as a key.
This map lives in the Automaton object used by the DFAPacketizer.
It is never changed during the life of the object after
having been created during the creation of the Automaton

This map creation can make the creation of a DFAPacketizer
quite expensive if the target contains a considerable
amount of transition states.

Considering that TableGen already generates a
sorted list of transitions by State/Action pairs
we could just use that directly in our Automaton
and search entries with std::lower_bound instead of copying
it in a map and paying the execution time and memory cost.

Reviewers: jmolloy, ThomasRaoux

Subscribers: llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D72682

2 years ago[mlir][spirv] Fix SPV_MM_Vulkan extension reqirements
Lei Zhang [Sat, 4 Jan 2020 22:04:58 +0000 (17:04 -0500)]
[mlir][spirv] Fix SPV_MM_Vulkan extension reqirements

SPV_MM_Vulkan can be enabled by the SPV_KHR_vulkan_memory_model extension.

Differential Revision: https://reviews.llvm.org/D72764

2 years ago[mlir][spirv] Use symbolize functions in enum attribute predicates
Lei Zhang [Sat, 4 Jan 2020 21:19:29 +0000 (16:19 -0500)]
[mlir][spirv] Use symbolize functions in enum attribute predicates

By default, for an enum attribute, we will generate a list of equality
comparisons for all supported cases inside it's predicate. This list
can be fairly large for certain SPIR-V enum attributes. Instead, we
already have such a list generated by EnumsGen in the symbolize
functions. Leverage that to simplify the generated C++ code.

Differential Revision: https://reviews.llvm.org/D72763

2 years ago[mlir][spirv] Add implied capabilities and availability for capabilities
Lei Zhang [Thu, 26 Dec 2019 14:31:46 +0000 (09:31 -0500)]
[mlir][spirv] Add implied capabilities and availability for capabilities

Certain SPIR-V capabilities are only available in certain SPIR-V versions
or extensions. Also a SPIR-V capability may implicitly declares other

This commit updates gen_spirv_dialect.py to support generating such
information into SPIRVBase.td. It requires us to topologically sort
all capabilities because now a capability can refer to another one.

This commits also registers a few extensions because their symbols are
used by capability availability.

Note that this commit hasn't updated SPIRVConversionTarget to take
into consideration such relationship yet. That will be done in a
following-up commit.

Differential Revision: https://reviews.llvm.org/D72760

2 years ago[NFC][PowerPC] Remove unnecessary link components.
Steven Wan [Fri, 17 Jan 2020 02:22:51 +0000 (21:22 -0500)]
[NFC][PowerPC] Remove unnecessary link components.

Remove unused link components for PowerPC target unittest according
to post commit comments. This is a redo for a previous commit
"fc4e43ad618b" that removed a few components that are necessary
when libraries are to be built shared (i.e., BUILD_SHARED_LIBS=ON).

2 years agoAdd extra test file forgotten in 45d7080.
Richard Smith [Fri, 17 Jan 2020 02:12:45 +0000 (18:12 -0800)]
Add extra test file forgotten in 45d7080.

2 years agoRevert "[RISCV] Support ABI checking with per function target-features"
Zakk Chen [Fri, 17 Jan 2020 02:01:07 +0000 (18:01 -0800)]
Revert "[RISCV] Support ABI checking with per function target-features"

This reverts commit 7bc58a779aaa1de56fad8b1bc8e46932d2f2f1e4.
It breaks EXPENSIVE_CHECKS on Windows

2 years agoAdd back more link components.
Steven Wan [Fri, 17 Jan 2020 01:19:25 +0000 (20:19 -0500)]
Add back more link components.

Add all previous link components back to unblock bots for the moment.
In the meantime, I'm investigating the BUILD_SHARED_LIBS=ON build to
find out the minimal list of components needed.

2 years ago[modules] Do not cache invalid state for modules that we attempted to load.
Volodymyr Sapsai [Fri, 17 Jan 2020 01:12:41 +0000 (17:12 -0800)]
[modules] Do not cache invalid state for modules that we attempted to load.

Partially reverts 0a2be46cfdb698fefcc860a56b47dde0884d5335 as it turned
out to cause redundant module rebuilds in multi-process incremental builds.
When a module was getting out of date, all compilation processes started at the
same time were marking it as `ToBuild`. So each process was building the same
module instead of checking if it was built by someone else and using that
result. In addition to the work duplication, contention on the same .pcm file
wasn't making builds faster.

Note that for a single-process build this change would cause redundant module
reads and validations. But reading a module is faster than building it and
multi-process builds are more common than single-process. So I'm willing to
make such a trade-off.


Reviewed By: dexonsmith

Differential Revision: https://reviews.llvm.org/D72860

2 years agoFix a buffer-size bug when the first DW_OP_piece is undefined
Adrian Prantl [Thu, 16 Jan 2020 22:21:17 +0000 (14:21 -0800)]
Fix a buffer-size bug when the first DW_OP_piece is undefined

and document the shortcomings of LLDB's partially defined DW_OP_piece

This would manifest as "DW_OP_piece for offset foo but top of stack is
of size bar".


Differential Revision: https://reviews.llvm.org/D72880

2 years agoAdd testing for DW_OP_piece and fix a bug with small Scalar values.
Adrian Prantl [Thu, 16 Jan 2020 22:21:03 +0000 (14:21 -0800)]
Add testing for DW_OP_piece and fix a bug with small Scalar values.

By switching to Scalars that are backed by explicitly-sized APInts we
can avoid a bug that increases the buffer reserved for a small piece
to the next-largest host integer type.

This manifests as "DW_OP_piece for offset foo but top of stack is of size bar".

Differential Revision: https://reviews.llvm.org/D72879

2 years ago[lldb/Debugger] Rename ExecuteIOHandlers to RunIOHandlers (NFC)
Jonas Devlieghere [Fri, 17 Jan 2020 00:45:18 +0000 (16:45 -0800)]
[lldb/Debugger] Rename ExecuteIOHandlers to RunIOHandlers (NFC)

This improves consistency among the related methods.

2 years ago[xray] add --no-demangle cli opt for llvm-xray extract to output mangled names
Max Sherman [Fri, 17 Jan 2020 00:28:15 +0000 (16:28 -0800)]
[xray] add --no-demangle cli opt for llvm-xray extract to output mangled names

This adds an additional cli flag for the llvm-xray extract tool.  This
is useful if you're more interested in consuming the mangled symbol
name, instead of the default now which is demangled.

Differential Revision: https://reviews.llvm.org/D72804

2 years ago[FastISel] Lower `llvm.dbg.value(undef, ...` correctly.
Davide Italiano [Thu, 16 Jan 2020 22:02:09 +0000 (14:02 -0800)]
[FastISel] Lower `llvm.dbg.value(undef, ...` correctly.

Instead of just dropping them.


Reviewers: aprantl, vsk, ab, paquette, echristo

Subscribers: hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D72877

2 years agoAdd back other PowerPC link components.
Steven Wan [Fri, 17 Jan 2020 00:14:39 +0000 (19:14 -0500)]
Add back other PowerPC link components.

Add the link components back to unblock bots for the moment. In the
meantime, I'm investigating the BUILD_SHARED_LIBS=ON build to find
out the minimal list of components needed.

2 years agoMove static function to inline function - this fixes a conceivable
Eric Christopher [Fri, 17 Jan 2020 00:12:06 +0000 (16:12 -0800)]
Move static function to inline function - this fixes a conceivable
ODR violation and a clang-tidy warning about an unused function
in a number of translation units.

2 years ago[gn build] replace llvm_allow_tardy_revision with llvm_append_vc_rev
Nico Weber [Fri, 17 Jan 2020 00:05:07 +0000 (19:05 -0500)]
[gn build] replace llvm_allow_tardy_revision with llvm_append_vc_rev

Previously, the gn build would create VCSRevision.h / VCSVersion.h
by default wouldn't add a dependency on .git/logs/HEAD so that
the step doesn't rerun after every branch switch or every pull.

That's bad for deterministic builds, and having --version print
some arbitrarily old revision isn't great either.

Instead, move to the model that the cmake build (now) uses fairly
consistently: If llvm_append_vc_rev is set, include the revision,
else don't.

Since the GN build is focused on developers, set llvm_append_vc_rev
to false instead of true by default (different from the cmake build),
so that things don't rebuild after every branch switch and every

While here, also remove some pre-monorepo code.

Differential Revision: https://reviews.llvm.org/D72859

2 years agoMake LLVM_APPEND_VC_REV=OFF affect clang, lld, and lldb as well.
Nico Weber [Fri, 17 Jan 2020 00:04:08 +0000 (19:04 -0500)]
Make LLVM_APPEND_VC_REV=OFF affect clang, lld, and lldb as well.

When LLVM_APPEND_VC_REV=OFF is set, the current git hash is no
longer embedded into binaries (mostly for --version output).
Without it, most binaries need to relink after every single
commit, even if they didn't change otherwise (due to, say,
a documentation-only commit).

LLVM_APPEND_VC_REV is ON by default, so this doesn't change the
default behavior of anything.

With this, all clients of GenerateVersionFromVCS.cmake honor

Differential Revision: https://reviews.llvm.org/D72855

2 years ago[mlir] Add missing dependency on LinalgUtils
Geoffrey Martin-Noble [Thu, 16 Jan 2020 23:40:16 +0000 (23:40 +0000)]
[mlir] Add missing dependency on LinalgUtils

Differential Revision: https://reviews.llvm.org/D72821

2 years agoPointerLikeTypeTraits: Standardize NumLowBitsAvailable on static constexpr rather...
David Blaikie [Wed, 15 Jan 2020 20:36:20 +0000 (12:36 -0800)]
PointerLikeTypeTraits: Standardize NumLowBitsAvailable on static constexpr rather than anonymous enum

This is (more?) usable by GDB pretty printers and seems nicer to write.

There's one tricky caveat that in C++14 (LLVM's codebase today) the
static constexpr member declaration is not a definition - so odr use of
this constant requires an out of line definition, which won't be
provided (that'd make all these trait classes more annoyidng/expensive
to maintain). But the use of this constant in the library implementation
is/should always be in a non-odr context - only two unit tests needed to
be touched to cope with this/avoid odr using these constants.

Based on/expanded from D72590 by Christian Sigg.

2 years ago[NFC] Fold isHugeExpression into hasHugeExpression and update callers
Eric Christopher [Thu, 16 Jan 2020 23:28:14 +0000 (15:28 -0800)]
[NFC] Fold isHugeExpression into hasHugeExpression and update callers

2 years ago[AArch64][GlobalISel] Change G_FCONSTANTs feeding into stores into G_CONSTANTS
Jessica Paquette [Thu, 16 Jan 2020 00:20:29 +0000 (16:20 -0800)]
[AArch64][GlobalISel] Change G_FCONSTANTs feeding into stores into G_CONSTANTS

Given the following situation:

x = G_FCONSTANT (something that can't be materialized)
G_STORE x, some_addr

We know that x must be materialized as at least a single mov. However, at the
time of selection, the G_STORE will have been regbankselected to a FPR store.

So, as a result, you'll get an unnecessary fmov into the G_STORE.

Storing a constant value in a GPR and a constant value in a FPR are the same.
So, whenever you see a G_FCONSTANT that feeds into only G_STORES, so might as
well make it a G_CONSTANT.

This adds a target-specific combine which changes G_FCONSTANTs feeding into

Differential Revision: https://reviews.llvm.org/D72814

2 years ago[OPENMP]Do not emit RTTI descriptor for NVPTX devices.
Alexey Bataev [Thu, 16 Jan 2020 22:57:10 +0000 (17:57 -0500)]
[OPENMP]Do not emit RTTI descriptor for NVPTX devices.

Need to disable emission of RTTI descriptors for NVPTX devices to be
able to use dynamic classes without unresolved symbols at link stage.

2 years agoAMDGPU: Update clang test
Matt Arsenault [Thu, 16 Jan 2020 22:46:48 +0000 (17:46 -0500)]
AMDGPU: Update clang test

2 years ago[clangd][test] Disable a particular testcase in FindExplicitReferencesTest when LLVM_...
Jan Korous [Thu, 16 Jan 2020 22:54:59 +0000 (14:54 -0800)]
[clangd][test] Disable a particular testcase in FindExplicitReferencesTest when LLVM_ENABLE_EXPENSIVE_CHECKS

The test is failing on our CI bots.
Seems like the order of results for one target is undefined.

(post-commit review)
Differential Revision: https://reviews.llvm.org/D72883

2 years ago[mlir] support translation of multidimensional vectors to LLVM IR
Alex Zinenko [Thu, 16 Jan 2020 15:21:14 +0000 (16:21 +0100)]
[mlir] support translation of multidimensional vectors to LLVM IR

MLIR unlike LLVM IR supports multidimensional vector types. Such types are
lowered to nested LLVM IR arrays wrapping an LLVM IR vector for the innermost
dimension of the MLIR vector. MLIR supports constants of such types using
ElementsAttr for values. Introduce support for converting ElementsAttr into
LLVM IR Constant Aggregates recursively. This enables translation of
multidimensional vector constants from MLIR to LLVM IR.

Differential Revision: https://reviews.llvm.org/D72846

2 years ago[mlir] NFC: Fix trivial typos
Kazuaki Ishizaki [Thu, 16 Jan 2020 22:58:04 +0000 (23:58 +0100)]
[mlir] NFC: Fix trivial typos

Summary: Fix trivial typos

Differential Revision: https://reviews.llvm.org/D72672

2 years ago[lld][WebAssembly] Use a more meaningful name for stub functions
Sam Clegg [Thu, 16 Jan 2020 22:36:44 +0000 (14:36 -0800)]
[lld][WebAssembly] Use a more meaningful name for stub functions

When we generate these stub functions on signature mismatches give
them a more meaningful name so that when people see this in stack
traces is gives a clue as the what is going on.

See: https://github.com/emscripten-core/emscripten/issues/10226

Differential Revision: https://reviews.llvm.org/D72881

2 years ago[libcxx] Temporarily switch back to pthread backend for Fuchsia
Petr Hosek [Thu, 16 Jan 2020 20:12:38 +0000 (12:12 -0800)]
[libcxx] Temporarily switch back to pthread backend for Fuchsia

We switched to C11 thread API on Fuchsia in ab9aefe, but further
testing showed that Fuchsia's C11 mutex implementation needs a few
improvements for this to be usable, so we temporarily switch back
to the pthread implementation until those issues are addressed.

Differential Revision: https://reviews.llvm.org/D72862

2 years agolldb: xfail TestCrossDSOTailCalls.py and TestCrossObjectTailCalls.py on arm/aarch64
Vedant Kumar [Thu, 16 Jan 2020 22:43:58 +0000 (14:43 -0800)]
lldb: xfail TestCrossDSOTailCalls.py and TestCrossObjectTailCalls.py on arm/aarch64

This effectively reverts commit
8d2f252bb8e4d199be8498c4ee2245117ef08fd2, which went a bit too far and
disabled these on all non-Darwin systems.

2 years agoRevert "[WebAssembly] Track frame registers through VReg and local allocation"
Derek Schuff [Thu, 16 Jan 2020 22:38:00 +0000 (14:38 -0800)]
Revert "[WebAssembly] Track frame registers through VReg and local allocation"

This reverts commit 3a05c3969c18b5520e360b78fc63cda39a6be98f.
It breaks under expensive-checks and on Windows

2 years agoAMDGPU: Do permlane16 vdst_in discard optimization in InstCombine
Matt Arsenault [Thu, 16 Jan 2020 14:59:56 +0000 (09:59 -0500)]
AMDGPU: Do permlane16 vdst_in discard optimization in InstCombine

There's more potential value to discarding the source value earlier,
since we always know the value of the fi/bc bits.

2 years agoAMDGPU: Move permlane discard vdst_in optimization
Matt Arsenault [Thu, 16 Jan 2020 03:25:58 +0000 (22:25 -0500)]
AMDGPU: Move permlane discard vdst_in optimization

This case can be handled as a regular selection pattern, so move it
out of the weird post-isel folding code which doesn't have an exactly
equivalent place in GlobalISel.

I think it doesn't make much sense to do this optimization here
though, and it would be more useful in instcombine. There's not really
any new information that will be gained during lowering since these
inputs were known from the beginning.

2 years ago[llvm-nm] Use `StringRef` over `const std::string &` params
Sam Clegg [Tue, 14 Jan 2020 17:44:28 +0000 (09:44 -0800)]
[llvm-nm] Use `StringRef` over `const std::string &` params

Differential Revision: https://reviews.llvm.org/D72718

2 years agoAdd BuiltinsHexagonDep.def to clang module map
Krzysztof Parzyszek [Thu, 16 Jan 2020 21:54:24 +0000 (15:54 -0600)]
Add BuiltinsHexagonDep.def to clang module map

2 years ago[WebAssembly] Track frame registers through VReg and local allocation
Derek Schuff [Wed, 18 Dec 2019 22:50:19 +0000 (14:50 -0800)]
[WebAssembly] Track frame registers through VReg and local allocation

This change has 2 components:

Target-independent: add a method getDwarfFrameBase to TargetFrameLowering. It
describes how the Dwarf frame base will be encoded.  That can be a register (the
default), the CFA (which replaces NVPTX-specific logic in DwarfCompileUnit), or
a DW_OP_WASM_location descriptr.

WebAssembly: Allow WebAssemblyFunctionInfo::getFrameRegister to return the
correct virtual register instead of FP32/SP32 after WebAssemblyReplacePhysRegs
has run.  Make WebAssemblyExplicitLocals store the local it allocates for the
frame register. Use this local information to implement getDwarfFrameBase

The result is that the DW_AT_frame_base attribute is correctly encoded for each
subprogram, and each param and local variable has a correct DW_AT_location that
uses DW_OP_fbreg to refer to the frame base.

Differential Revision: https://reviews.llvm.org/D71681

2 years ago[IR] fix crash in Constant::isElementWiseEqual() with FP types
Sanjay Patel [Thu, 16 Jan 2020 21:20:48 +0000 (16:20 -0500)]
[IR] fix crash in Constant::isElementWiseEqual() with FP types

We lifted this code from InstCombine for general usage in:
...but it's not safe as-is. There are no existing users that can
trigger this bug, but I discovered it via crashing several
regression tests when trying to use it for select folding in

ICmp requires (vector) integer types, so give up on anything that's
not integer or FP (pointers and ?) then bitcast the constants
before trying the match. That matches the definition of "equal or
undef" that I was looking for. If someone wants an FP-aware version
of equality (deal with NaN, -0.0), that could be a different mode
or different function.

Differential Revision: https://reviews.llvm.org/D72784

2 years ago[OPENMP]Avoid string concat where possible and use standard name
Alexey Bataev [Thu, 16 Jan 2020 20:46:34 +0000 (15:46 -0500)]
[OPENMP]Avoid string concat where possible and use standard name
generation function, NFC.

2 years ago[gn build] Port d5c6b8407c1
LLVM GN Syncbot [Thu, 16 Jan 2020 21:35:08 +0000 (21:35 +0000)]
[gn build] Port d5c6b8407c1

2 years agoFactor out renaming logic from readability-identifier-naming
Logan Smith [Thu, 16 Jan 2020 21:29:19 +0000 (16:29 -0500)]
Factor out renaming logic from readability-identifier-naming

Before this patch, readability-identifier-naming contained a significant amount
of logic for (a) checking the style of identifiers, followed by (b) renaming/
applying fix-its. This patch factors out (b) into a separate base class so that
it can be reused by other checks that want to do renaming. This also cleans up
readability-identifier-naming significantly, since now it only needs to be
concerned with the interesting details of (a).

2 years agoscudo: Add initial memory tagging support.
Peter Collingbourne [Thu, 5 Dec 2019 01:46:15 +0000 (17:46 -0800)]
scudo: Add initial memory tagging support.

When the hardware and operating system support the ARM Memory Tagging
Extension, tag primary allocation granules with a random tag. The granules
either side of the allocation are tagged with tag 0, which is normally
excluded from the set of tags that may be selected randomly. Memory is
also retagged with a random tag when it is freed, and we opportunistically
reuse the new tag when the block is reused to reduce overhead. This causes
linear buffer overflows to be caught deterministically and non-linear buffer
overflows and use-after-free to be caught probabilistically.

This feature is currently only enabled for the Android allocator
and depends on an experimental Linux kernel branch available here:

All code that depends on the kernel branch is hidden behind a macro,
ANDROID_EXPERIMENTAL_MTE. This is the same macro that is used by the Android
platform and may only be defined in non-production configurations. When the
userspace interface is finalized the code will be updated to use the stable
interface and all #ifdef ANDROID_EXPERIMENTAL_MTE will be removed.

Differential Revision: https://reviews.llvm.org/D70762

2 years ago[NFC] Remove unnecessary link components.
StevenWanYu [Thu, 16 Jan 2020 21:08:07 +0000 (16:08 -0500)]
[NFC] Remove unnecessary link components.

Remove unused link components in unittest according to post commit

2 years ago[clangd] Add workaround for GCC5 host compilers. NFC.
Michael Liao [Thu, 16 Jan 2020 21:02:47 +0000 (16:02 -0500)]
[clangd] Add workaround for GCC5 host compilers. NFC.

2 years ago[Hexagon] Add ELF flags for Hexagon v66 to ELFYAML.cpp
Krzysztof Parzyszek [Thu, 16 Jan 2020 20:46:03 +0000 (14:46 -0600)]
[Hexagon] Add ELF flags for Hexagon v66 to ELFYAML.cpp

2 years ago[GVN] add GVN parameters parsing to new pass manager
Fedor Sergeev [Thu, 16 Jan 2020 17:31:24 +0000 (20:31 +0300)]
[GVN] add GVN parameters parsing to new pass manager

Introduce parsing, add a few instances of parameter use into GVN-PRE tests.

Reviewers: skatkov, asbirlea
Reviewed By: skatkov

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D72752

2 years agoResubmit: [JumpThreading] Thread jumps through two basic blocks
Kazu Hirata [Thu, 16 Jan 2020 19:04:16 +0000 (11:04 -0800)]
Resubmit: [JumpThreading] Thread jumps through two basic blocks

This reverts commit 2d258ed931cdf47a7d1dcf08ad963b5452a8670f.  This
revision fixes the Windows build and adds a testcase for it, namely
thread-two-bbs3.ll.  My original patch improperly copied EH pads on
Windows.  This patch disregards jump threading opportunities having to
do with EH pads.

[JumpThreading] Thread jumps through two basic blocks

This patch teaches JumpThreading.cpp to thread through two basic
blocks like:

    %var = phi i32* [ null, %bb1 ], [ @a, %bb2 ]
    %tobool = icmp eq i32 %cond, 0
    br i1 %tobool, label %bb4, label ...

    %cmp = icmp eq i32* %var, null
    br i1 %cmp, label bb5, label bb6

by duplicating basic blocks like bb3 above.  Once we duplicate bb3 as
bb3.dup and redirect edge bb2->bb3 to bb2->bb3.dup, we have:

    %var = phi i32* [ @a, %bb2 ]
    %tobool = icmp eq i32 %cond, 0
    br i1 %tobool, label %bb4, label ...

    %var = phi i32* [ null, %bb1 ]
    %tobool = icmp eq i32 %cond, 0
    br i1 %tobool, label %bb4, label ...

    %cmp = icmp eq i32* %var, null
    br i1 %cmp, label bb5, label bb6

Then the existing code in JumpThreading.cpp can thread edge
bb3.dup->bb4 through bb4 and eventually create bb3.dup->bb5.

Reviewers: wmi

Subscribers: hiraditya, jfb, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D70247

2 years ago[Hexagon] Update autogenerated intrinsic info in clang
Krzysztof Parzyszek [Thu, 16 Jan 2020 20:13:25 +0000 (14:13 -0600)]
[Hexagon] Update autogenerated intrinsic info in clang

In addition to that, use target features to validate intrinsic
availability on a given target.

2 years ago[ELF] -r: don't create .interp
Fangrui Song [Thu, 16 Jan 2020 20:00:24 +0000 (12:00 -0800)]
[ELF] -r: don't create .interp

`{clang,gcc} -nostdlib -r a.c` passes --dynamic-linker to the linker,
and the expected behavior is to ignore it.

If .interp is kept in the relocatable object file, a final link will get
PT_INTERP even if --dynamic-linker is not specified. glibc ld.so expects
to see PT_DYNAMIC and the executable will likely fail to run.

Ignore --dynamic-linker in -r mode as well as -shared.

2 years agoAddress redirect issue on Windows.
StevenWanYu [Thu, 16 Jan 2020 20:07:50 +0000 (15:07 -0500)]
Address redirect issue on Windows.

2 years ago[OpenMP][Tool] Fix memory leak and double-allocation
Joachim Protze [Wed, 15 Jan 2020 17:07:47 +0000 (07:07 -1000)]
[OpenMP][Tool] Fix memory leak and double-allocation

Fix the memory leak pointed out in https://reviews.llvm.org/D70412.
And a second one due to double-allocation.

Reviewed by: Hahnfeld

Differential revision: https://reviews.llvm.org/D72779

2 years ago[libc++] Fix Windows DLL build for string.
Eric Fiselier [Thu, 16 Jan 2020 20:00:34 +0000 (15:00 -0500)]
[libc++] Fix Windows DLL build for string.

We need to mark string::npos with _LIBCPP_FUNC_VIS on the first
in-class declaration, otherwise it might get ignored

2 years ago[lldb/test] Exted test for CMTime data formatter
Jonas Devlieghere [Thu, 16 Jan 2020 19:57:57 +0000 (11:57 -0800)]
[lldb/test] Exted test for CMTime data formatter

Cover more cases handled by the formatter.

2 years agoAMDGPU: Remove outdated comment
Matt Arsenault [Wed, 15 Jan 2020 14:28:03 +0000 (09:28 -0500)]
AMDGPU: Remove outdated comment

2 years agoDon't run powerpc lit test case on other platforms.
StevenWanYu [Thu, 16 Jan 2020 19:37:25 +0000 (14:37 -0500)]
Don't run powerpc lit test case on other platforms.

Only run this test on powerpc tragets, because other platforms might
not have powerpc registered.

2 years agoAMDGPU: Update more tests to use modern buffer intrinsics
Matt Arsenault [Thu, 16 Jan 2020 19:05:46 +0000 (14:05 -0500)]
AMDGPU: Update more tests to use modern buffer intrinsics

2 years agoAMDGPU/GlobalISel: Improve lowering of G_SEXT_INREG
Matt Arsenault [Sat, 11 Jan 2020 23:03:18 +0000 (18:03 -0500)]
AMDGPU/GlobalISel: Improve lowering of G_SEXT_INREG

Clamping the scalar is much better than lowering with superwide shifts
for types > s64.

2 years agoGlobalISel: Don't ignore requested ext narrowing type
Matt Arsenault [Fri, 10 Jan 2020 15:41:29 +0000 (10:41 -0500)]
GlobalISel: Don't ignore requested ext narrowing type

This was assuming the narrow target was the source type. Respect the
requested type when these don't match by using intermediate
merges. This avoids producing very wide, illegal shift expansions.

2 years agoGlobalISel: Move extension scalar narrowing to separate function
Matt Arsenault [Fri, 10 Jan 2020 16:02:18 +0000 (11:02 -0500)]
GlobalISel: Move extension scalar narrowing to separate function

Also rename a few things. Handling a different requested type will
require this to become much more complex.

2 years ago[Hexagon] Update autogeneated intrinsic information in LLVM
Krzysztof Parzyszek [Thu, 16 Jan 2020 17:10:34 +0000 (11:10 -0600)]
[Hexagon] Update autogeneated intrinsic information in LLVM

2 years ago[LegalizeDAG][Mips] Add an assert to protect a uint_to_fp implementation from double...
Craig Topper [Thu, 16 Jan 2020 18:27:38 +0000 (10:27 -0800)]
[LegalizeDAG][Mips] Add an assert to protect a uint_to_fp implementation from double rounding. Add a i32->f32 uint_to_fp implementation that avoids this code.

The algorithm here only works if the sint_to_fp doesn't do any
rounding. Otherwise it can round before the offset fixup is
applied. Add an assert to protect this.

To avoid breaking the one test in tree that tested this code
with a set of types that fail the assert, I've enabled i32->f32
to use the i64->f32 algorithm. This only occurs when f64 isn't
a legal type. If f64 is legal then we do i32->f64->f32 instead.

Differential Revision: https://reviews.llvm.org/D72794

2 years ago[clangd] Print underlying type for decltypes in hover
Kadir Cetinkaya [Thu, 16 Jan 2020 14:20:13 +0000 (15:20 +0100)]
[clangd] Print underlying type for decltypes in hover

Summary: Fixes https://github.com/clangd/clangd/issues/249

Reviewers: sammccall

Subscribers: ilya-biryukov, MaskRay, jkorous, arphaman, usaxena95, cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D72498

2 years ago[clangd] Make define outline code action visible
Kadir Cetinkaya [Thu, 16 Jan 2020 14:36:12 +0000 (15:36 +0100)]
[clangd] Make define outline code action visible

Summary: This got forgotten during the process.

Reviewers: sammccall, usaxena95

Subscribers: ilya-biryukov, MaskRay, jkorous, arphaman, cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D72840

2 years agoAMDGPU: Remove IR section from MIR test
Matt Arsenault [Thu, 16 Jan 2020 18:37:59 +0000 (13:37 -0500)]
AMDGPU: Remove IR section from MIR test

Also generate check lines so this isn't just testing the meaningless
block name.

2 years agoGlobalISel: Apply target MMO flags to atomics
Matt Arsenault [Sun, 12 Jan 2020 20:54:09 +0000 (15:54 -0500)]
GlobalISel: Apply target MMO flags to atomics

Unify MMO flag handling with SelectionDAG like with loads and stores.

2 years agoGlobalISel: Preserve load/store metadata in IRTranslator
Matt Arsenault [Sun, 12 Jan 2020 19:10:42 +0000 (14:10 -0500)]
GlobalISel: Preserve load/store metadata in IRTranslator

This was dropping the invariant metadata on dead argument loads, so
they weren't deleted.

Atomics still need to be fixed the same way. Also, apparently store
was never preserving dereferencable which should also be fixed.

2 years agoTableGen/GlobalISel: Fix srcvalue inputs
Matt Arsenault [Thu, 16 Jan 2020 15:47:13 +0000 (10:47 -0500)]
TableGen/GlobalISel: Fix srcvalue inputs

Allow using srcvalue for discarding pattern inputs.

2 years agoTableGen: Remove dead code
Matt Arsenault [Thu, 16 Jan 2020 03:50:37 +0000 (22:50 -0500)]
TableGen: Remove dead code

2 years agoAMDGPU: Update tests to use modern buffer intrinsics
Matt Arsenault [Thu, 16 Jan 2020 16:34:19 +0000 (11:34 -0500)]
AMDGPU: Update tests to use modern buffer intrinsics

2 years agoDelete control character from comment. (NFC)
Adrian Prantl [Thu, 16 Jan 2020 18:43:49 +0000 (10:43 -0800)]
Delete control character from comment. (NFC)

2 years ago[Hexagon] Add a target feature to disable compound instructions
Krzysztof Parzyszek [Thu, 16 Jan 2020 18:00:35 +0000 (12:00 -0600)]
[Hexagon] Add a target feature to disable compound instructions

This affects the following instructions:
Tag: M4_mpyrr_addr     Syntax: Ry32 = add(Ru32,mpyi(Ry32,Rs32))
Tag: M4_mpyri_addr_u2  Syntax: Rd32 = add(Ru32,mpyi(#u6:2,Rs32))
Tag: M4_mpyri_addr     Syntax: Rd32 = add(Ru32,mpyi(Rs32,#u6))
Tag: M4_mpyri_addi     Syntax: Rd32 = add(#u6,mpyi(Rs32,#U6))
Tag: M4_mpyrr_addi     Syntax: Rd32 = add(#u6,mpyi(Rs32,Rt32))
Tag: S4_addaddi        Syntax: Rd32 = add(Rs32,add(Ru32,#s6))
Tag: S4_subaddi        Syntax: Rd32 = add(Rs32,sub(#s6,Ru32))
Tag: S4_or_andix       Syntax: Rx32 = or(Ru32,and(Rx32,#s10))
Tag: S4_andi_asl_ri    Syntax: Rx32 = and(#u8,asl(Rx32,#U5))
Tag: S4_ori_asl_ri     Syntax: Rx32 = or(#u8,asl(Rx32,#U5))
Tag: S4_addi_asl_ri    Syntax: Rx32 = add(#u8,asl(Rx32,#U5))
Tag: S4_subi_asl_ri    Syntax: Rx32 = sub(#u8,asl(Rx32,#U5))
Tag: S4_andi_lsr_ri    Syntax: Rx32 = and(#u8,lsr(Rx32,#U5))
Tag: S4_ori_lsr_ri     Syntax: Rx32 = or(#u8,lsr(Rx32,#U5))
Tag: S4_addi_lsr_ri    Syntax: Rx32 = add(#u8,lsr(Rx32,#U5))
Tag: S4_subi_lsr_ri    Syntax: Rx32 = sub(#u8,lsr(Rx32,#U5))

2 years ago[ELF] Decrease alignment of ThunkSection on 64-bit targets from 8 to 4
Fangrui Song [Thu, 16 Jan 2020 01:44:14 +0000 (17:44 -0800)]
[ELF] Decrease alignment of ThunkSection on 64-bit targets from 8 to 4

ThunkSection contains 4-byte instructions on all targets that use
thunks. Thunks should not be used in any performance sensitive places,
and locality/cache line/instruction fetching arguments should not apply.

We use 16 bytes as preferred function alignments for modern PowerPC cores.
In any case, 8 is not optimal.

Differential Revision: https://reviews.llvm.org/D72819

2 years agoRevert "[Loop Peeling] Add possibility to enable peeling on loop nests."
Arkady Shlykov [Thu, 16 Jan 2020 16:35:00 +0000 (08:35 -0800)]
Revert "[Loop Peeling] Add possibility to enable peeling on loop nests."

This reverts commit 3f3017e because there's a failure on peel-loop-nests.ll

Differential Revision: https://reviews.llvm.org/D70304

2 years ago[gn build] (manually) port bed7626f04f7
Nico Weber [Thu, 16 Jan 2020 18:19:09 +0000 (13:19 -0500)]
[gn build] (manually) port bed7626f04f7

2 years ago[gn build] include revision information in lld --version output
Nico Weber [Thu, 16 Jan 2020 18:10:27 +0000 (13:10 -0500)]
[gn build] include revision information in lld --version output

2 years ago[PowerPC][AIX] Make PIC the default relocation model for AIX
stevewan [Thu, 16 Jan 2020 16:42:11 +0000 (11:42 -0500)]
[PowerPC][AIX] Make PIC the default relocation model for AIX

The `llc` tool currently defaults to Static relocation model and generates non-relocatable code for 32-bit Power.
This is not desirable on AIX where we always generate Position Independent Code (PIC). This patch makes PIC the default relocation model for AIX.

Reviewers: daltenty, hubert.reinterpretcast, DiggerLin, Xiangling_L, sfertile

Reviewed By: hubert.reinterpretcast

Subscribers: mgorny, wuzish, nemanjai, hiraditya, kbarton, jsji, shchenz, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D72479

2 years ago[SystemZ] Avoid unnecessary conversions in vecintrin.h
Ulrich Weigand [Thu, 16 Jan 2020 17:56:16 +0000 (18:56 +0100)]
[SystemZ] Avoid unnecessary conversions in vecintrin.h

Use floating-point instead of integer zero constants to avoid
creating implicit conversions, which currently cause suboptimal
code to be generated with -ffp-exception-behavior=strict.

NFC otherwise.

2 years ago[lldb/test] Revert changes to debug-names-compressed.cpp
Pavel Labath [Thu, 16 Jan 2020 17:55:59 +0000 (18:55 +0100)]
[lldb/test] Revert changes to debug-names-compressed.cpp

With the changes in 15a6df52efa, the test is failing in some
configurations. Reverting while I investigate

2 years agoremove an include that's unused after r347592
Nico Weber [Thu, 16 Jan 2020 17:47:56 +0000 (12:47 -0500)]
remove an include that's unused after r347592

2 years ago[LLDB] Convert Plugins/ObjectFile/wasm/ObjectFileWasm.h to unix line endings
Derek Schuff [Thu, 16 Jan 2020 17:38:37 +0000 (09:38 -0800)]
[LLDB] Convert Plugins/ObjectFile/wasm/ObjectFileWasm.h to unix line endings

2 years ago[LLDB] Add SymbolVendorWasm plugin for WebAssembly debugging
Paolo Severini [Thu, 16 Jan 2020 16:36:45 +0000 (08:36 -0800)]
[LLDB] Add SymbolVendorWasm plugin for WebAssembly debugging

Add plugin class SymbolVendorWasm, with the logic to manage debug symbols
for Wasm modules.

Reviewers: clayborg, labath, aprantl, sbc100, teemperor

Reviewed By: labath

Tags: #lldb

Differential Revision: https://reviews.llvm.org/D72650

2 years ago[GVN] introduce GVNOptions to control GVN pass behavior
Fedor Sergeev [Thu, 16 Jan 2020 16:02:44 +0000 (19:02 +0300)]
[GVN] introduce GVNOptions to control GVN pass behavior

There are a few global (cl::opt) controls that enable optional
behavior in GVN. Introduce GVNOptions that provide corresponding
per-pass instance controls.

That will allow to use GVN multiple times in pipeline each time
with different settings.

Reviewers: asbirlea, rnk, reames, skatkov, fhahn
Reviewed By: fhahn

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D72732

2 years ago[lldb/Scripts] Remove swig_bot_lib/__init__.py
Jonas Devlieghere [Thu, 16 Jan 2020 17:15:33 +0000 (09:15 -0800)]
[lldb/Scripts] Remove swig_bot_lib/__init__.py

2 years ago[llvm] Make new pass manager's OptimizationLevel a class
Mircea Trofin [Thu, 16 Jan 2020 16:51:50 +0000 (08:51 -0800)]
[llvm] Make new pass manager's OptimizationLevel a class

The old pass manager separated speed optimization and size optimization
levels into two unsigned values. Coallescing both in an enum in the new
pass manager may lead to unintentional casts and comparisons.

In particular, taking a look at how the loop unroll passes were constructed
previously, the Os/Oz are now (==new pass manager) treated just like O3,
likely unintentionally.

This change disallows raw comparisons between optimization levels, to
avoid such unintended effects. As an effect, the O{s|z} behavior changes
for loop unrolling and loop unroll and jam, matching O2 rather than O3.

The change also parameterizes the threshold values used for loop
unrolling, primarily to aid testing.

Reviewers: tejohnson, davidxl

Reviewed By: tejohnson

Subscribers: zzheng, ychen, mehdi_amini, hiraditya, steven_wu, dexonsmith, dang, cfe-commits, llvm-commits

Tags: #clang, #llvm

Differential Revision: https://reviews.llvm.org/D72547

2 years ago[gn build] Port 6b357866496
LLVM GN Syncbot [Thu, 16 Jan 2020 16:56:26 +0000 (16:56 +0000)]
[gn build] Port 6b357866496

2 years ago[Hexagon] Fix alignment info for __builtin_circ_lduh
Krzysztof Parzyszek [Thu, 16 Jan 2020 16:30:09 +0000 (10:30 -0600)]
[Hexagon] Fix alignment info for __builtin_circ_lduh

2 years ago[llvm-exegesis][mips] Add RegisterAliasingTest unit test
Miloš Stojanović [Mon, 30 Dec 2019 15:18:40 +0000 (16:18 +0100)]
[llvm-exegesis][mips] Add RegisterAliasingTest unit test

Differential Revision: https://reviews.llvm.org/D72004

2 years ago[llvm-exegesis][NFC] Refactor Mips tests fixtures into a base class.
Miloš Stojanović [Mon, 30 Dec 2019 14:50:51 +0000 (15:50 +0100)]
[llvm-exegesis][NFC] Refactor Mips tests fixtures into a base class.

Differential Revision: https://reviews.llvm.org/D72003

2 years agoAMDGPU/GlobalISel: Don't handle legacy buffer intrinsic
Matt Arsenault [Thu, 16 Jan 2020 16:28:46 +0000 (11:28 -0500)]
AMDGPU/GlobalISel: Don't handle legacy buffer intrinsic

2 years ago[MC][test] Fix non-portable GNU diff option
Hubert Tong [Thu, 16 Jan 2020 16:28:37 +0000 (11:28 -0500)]
[MC][test] Fix non-portable GNU diff option

Summary: This patch replaces the non-portable GNU diff option `--strip-trailing-cr` with the POSIX `-b` option in two test files.

Reviewers: daltenty, jasonliu

Reviewed By: daltenty

Subscribers: llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D72745