lldb.git
12 days agoMerge branch 'addmainunit4-altlink-sharedstmt-dieref-dwz3-inlinebug-testcategory... dwz
Jan Kratochvil [Sat, 1 May 2021 20:32:53 +0000 (22:32 +0200)]
Merge branch 'addmainunit4-altlink-sharedstmt-dieref-dwz3-inlinebug-testcategory-testcase' into addmainunit4-altlink-sharedstmt-dieref-dwz3-inlinebug-testcategory-testcase-symlink

12 days agoMerge branch 'addmainunit4-altlink-sharedstmt-dieref-dwz3-inlinebug-testcategory...
Jan Kratochvil [Sat, 1 May 2021 20:32:50 +0000 (22:32 +0200)]
Merge branch 'addmainunit4-altlink-sharedstmt-dieref-dwz3-inlinebug-testcategory' into addmainunit4-altlink-sharedstmt-dieref-dwz3-inlinebug-testcategory-testcase

12 days agoMerge branch 'addmainunit4-altlink-sharedstmt-dieref-dwz3-inlinebug' into addmainunit...
Jan Kratochvil [Sat, 1 May 2021 20:32:46 +0000 (22:32 +0200)]
Merge branch 'addmainunit4-altlink-sharedstmt-dieref-dwz3-inlinebug' into addmainunit4-altlink-sharedstmt-dieref-dwz3-inlinebug-testcategory

12 days agoMerge branch 'addmainunit4-altlink-sharedstmt-dieref-dwz3' into addmainunit4-altlink...
Jan Kratochvil [Sat, 1 May 2021 20:32:43 +0000 (22:32 +0200)]
Merge branch 'addmainunit4-altlink-sharedstmt-dieref-dwz3' into addmainunit4-altlink-sharedstmt-dieref-dwz3-inlinebug

12 days agoMerge branch 'addmainunit4-altlink-sharedstmt-dieref' into addmainunit4-altlink-share...
Jan Kratochvil [Sat, 1 May 2021 20:32:39 +0000 (22:32 +0200)]
Merge branch 'addmainunit4-altlink-sharedstmt-dieref' into addmainunit4-altlink-sharedstmt-dieref-dwz3

12 days agoMerge branch 'addmainunit4-altlink-sharedstmt' into addmainunit4-altlink-sharedstmt...
Jan Kratochvil [Sat, 1 May 2021 20:32:35 +0000 (22:32 +0200)]
Merge branch 'addmainunit4-altlink-sharedstmt' into addmainunit4-altlink-sharedstmt-dieref

12 days agoMerge branch 'addmainunit4-altlink' into addmainunit4-altlink-sharedstmt
Jan Kratochvil [Sat, 1 May 2021 20:32:32 +0000 (22:32 +0200)]
Merge branch 'addmainunit4-altlink' into addmainunit4-altlink-sharedstmt

12 days agoMerge branch 'addmainunit4' into addmainunit4-altlink
Jan Kratochvil [Sat, 1 May 2021 20:32:28 +0000 (22:32 +0200)]
Merge branch 'addmainunit4' into addmainunit4-altlink

12 days agoMerge remote-tracking branch 'origin/main' into addmainunit4
Jan Kratochvil [Sat, 1 May 2021 20:32:24 +0000 (22:32 +0200)]
Merge remote-tracking branch 'origin/main' into addmainunit4

12 days ago[RISCV] Add missing frontend tests for vcompress intrinsics.
Craig Topper [Sat, 1 May 2021 20:07:28 +0000 (13:07 -0700)]
[RISCV] Add missing frontend tests for vcompress intrinsics.

12 days agoMicrooptimize dominance a bit - NFC.
Chris Lattner [Sat, 1 May 2021 19:39:01 +0000 (12:39 -0700)]
Microoptimize dominance a bit - NFC.

Don't get RegionKindInterface if we won't use it. Noticed by inspection.

12 days ago[X86] AMD Zen 3 Scheduler Model
Roman Lebedev [Sat, 1 May 2021 19:04:48 +0000 (22:04 +0300)]
[X86] AMD Zen 3 Scheduler Model

Introduce basic schedule model for AMD Zen 3 CPU's, a.k.a `znver3`.

This is fully built from scratch, from llvm-mca measurements
and documented reference materials.
Nothing was copied from `znver2`/`znver1`.

I believe this is in a reasonable state of completion for inclusion,
probably better than D52779 `bdver2` was :)

Namely:
* uops are pretty spot-on (at least what llvm-mca can measure)
  {F16422596}
* latency is also pretty spot-on (at least what llvm-mca can measure)
  {F16422601}
* throughput is within reason
  {F16422607}

I haven't run much benchmarks with this,
however RawSpeed benchmarks says this is beneficial:
{F16603978}
{F16604029}

I'll call out the obvious problems there:
* i didn't really bother with X87 instructions
* i didn't really bother with obviously-microcoded/system instructions
* There are large discrepancy in throughput for `mr` and `rm` instructions.
  I'm not really sure if it's a modelling defect that needs to be fixed,
  or it's a defect of measurments.
* Pipe distributions are probably bad :)
  I can't do much here until AMD allows that to be fixed
  by documenting the appropriate counters and updating libpfm

That being said, as @RKSimon notes:
>>! In D94395#2647381, @RKSimon wrote:
> I'll mention again that all the znver* models appear to be very inaccurate wrt SIMD/FPU instructions <...>
so how much worse this could possibly be?!

Things that aren't there:
* Various tunings: zero idioms, etc. That is follow-ups.

Differential Revision: https://reviews.llvm.org/D94395

12 days agoFix type printing of array template args
Pratyush Das [Sat, 1 May 2021 18:47:27 +0000 (18:47 +0000)]
Fix type printing of array template args

The code example:
```
constexpr const char kEta[] = "Eta";
template <const char*, typename T> class Column {};
using quick = Column<kEta,double>;

void lookup() {
  quick c1;
  c1.ls();
}
```

emits error: no member named 'ls' in 'Column<&kEta, double>'. The patch fixes
the printed type name by not printing the ampersand for array types.

Differential Revision: https://reviews.llvm.org/D36368

12 days ago[Verifier] Slightly refactor code to reduce duplication, NFC.
Chris Lattner [Sat, 1 May 2021 18:42:28 +0000 (11:42 -0700)]
[Verifier] Slightly refactor code to reduce duplication, NFC.

12 days ago[SCEV] Simplify backedge count clearing (NFC)
Nikita Popov [Sat, 1 May 2021 15:40:26 +0000 (17:40 +0200)]
[SCEV] Simplify backedge count clearing (NFC)

This seems to be a leftover from when the BackedgeTakenInfo
stored multiple exit counts with manual memory management. At
some point this was switchted to a simple vector, and there should
be no need to micro-manage the clearing anymore. We can simply
drop the loop from the map and the the destructor do its job.

12 days ago[IndVars] Remove redundant loop invariance check (NFC)
Nikita Popov [Sat, 1 May 2021 15:21:20 +0000 (17:21 +0200)]
[IndVars] Remove redundant loop invariance check (NFC)

This is checked again directly below this condition.

12 days ago[AArch64] Prevent spilling between ldxr/stxr pairs
LemonBoy [Sat, 1 May 2021 15:13:50 +0000 (17:13 +0200)]
[AArch64] Prevent spilling between ldxr/stxr pairs

Apply the same logic used to check if CMPXCHG nodes should be expanded
at -O0: the register allocator may end up spilling some register in
between the atomic load/store pairs, breaking the atomicity and possibly
stalling the execution.

Fixes PR48017

Reviewed By: efriedman

Differential Revision: https://reviews.llvm.org/D101163

12 days ago[SCEV] Add tests for and/or loop guards (NFC)
Nikita Popov [Sat, 1 May 2021 14:45:28 +0000 (16:45 +0200)]
[SCEV] Add tests for and/or loop guards (NFC)

12 days ago[NFC][ARM] Regenerate arm64-atomic.ll test
LemonBoy [Sat, 1 May 2021 14:29:03 +0000 (16:29 +0200)]
[NFC][ARM] Regenerate arm64-atomic.ll test

Pre-requisite for D101163, the `NOLSE-0O` case shows registers being
spilled inside the rmw loop.

Use two separate prefixes for the `LSE-O0` case as some outputs differ
only by a comment that update_llc_test_checks.py ignores but lit does
not, causing the test to fail unexpectedly when run.

12 days ago[libc++] [test] Don't nasty-macro `__opt` yet; we actually use that one.
Arthur O'Dwyer [Sat, 1 May 2021 14:11:46 +0000 (10:11 -0400)]
[libc++] [test] Don't nasty-macro `__opt` yet; we actually use that one.

This reverts another of the macros just added in D101613, because it turns out
that the <optional> and <filesystem> headers use the identifier __opt.

12 days ago[libc++] [test] Don't nasty-macro `__z` yet; we actually use that one.
Arthur O'Dwyer [Sat, 1 May 2021 13:09:06 +0000 (09:09 -0400)]
[libc++] [test] Don't nasty-macro `__z` yet; we actually use that one.

This reverts one of the macros just added in D101613, because it turns out
that the <utility> header actually uses the identifiers __x, __y, __z.
We probably *shouldn't* use __z if it's reserved on Windows; but since
it's not causing us any active problem even on Windows, I think this is
the safest way to unbreak the test.

12 days ago[AMDGPU] Add options -mamdgpu-ieee -mno-amdgpu-ieee
Yaxun (Sam) Liu [Sun, 29 Mar 2020 14:32:03 +0000 (10:32 -0400)]
[AMDGPU] Add options -mamdgpu-ieee -mno-amdgpu-ieee

AMDGPU backend need to know whether floating point opcodes that support exception
flag gathering quiet and propagate signaling NaN inputs per IEEE754-2008, which is
conveyed by a function attribute "amdgpu-ieee". "amdgpu-ieee"="false" turns this off.
Without this function attribute backend assumes it is on for compute functions.

-mamdgpu-ieee and -mno-amdgpu-ieee are added to Clang to control this function attribute.
By default it is on. -mno-amdgpu-ieee requires -fno-honor-nans or equivalent.

Reviewed by: Matt Arsenault

Differential Revision: https://reviews.llvm.org/D77013

12 days agoRevert "[NFC][ARM] Regenerate arm64-atomic.ll test"
LemonBoy [Sat, 1 May 2021 11:00:45 +0000 (13:00 +0200)]
Revert "[NFC][ARM] Regenerate arm64-atomic.ll test"

This reverts commit d9856b12f2be257f1b7aaccde71eb0421a1aaaf3.

12 days ago[NFC][ARM] Regenerate arm64-atomic.ll test
LemonBoy [Sat, 1 May 2021 10:09:14 +0000 (12:09 +0200)]
[NFC][ARM] Regenerate arm64-atomic.ll test

Pre-requisite for D101163, the NOLSE-0O case shows registers being
spilled inside the rmw loop.

13 days ago[InstCombine] Add eq-of-parts tests using or (NFC)
Nikita Popov [Sat, 1 May 2021 09:47:07 +0000 (11:47 +0200)]
[InstCombine] Add eq-of-parts tests using or (NFC)

or-ne is the conjugated pattern for and-eq.

13 days ago[scudo][NFC] Fix clang-tidy warnings
Vitaly Buka [Sat, 1 May 2021 08:55:21 +0000 (01:55 -0700)]
[scudo][NFC] Fix clang-tidy warnings

13 days ago[scudo] Use require_constant_initialization
Vitaly Buka [Thu, 29 Apr 2021 08:19:51 +0000 (01:19 -0700)]
[scudo] Use require_constant_initialization

Attribute guaranties safe static initialization of globals.

Reviewed By: hctim

Differential Revision: https://reviews.llvm.org/D101514

13 days ago[libcxx] Reenable ranges for clang-cl
Martin Storsjö [Fri, 30 Apr 2021 10:57:37 +0000 (13:57 +0300)]
[libcxx] Reenable ranges for clang-cl

This reverts a224bf8ec423b42eea251407e7a6cc8398a5edf4 and fixes the
underlying issue.

The underlying issue is simply that MSVC headers contains a define
like "#define __in", where __in is one macro in the MSVC Source
Code Annotation Language, defined in sal.h

Just use a different variable name than "__in"
__indirectly_readable_impl, and add "__in" to nasty_macros.h just
like the existing __out. (Also adding a couple more potentially
conflicting ones.)

Differential Revision: https://reviews.llvm.org/D101613

13 days ago[clang-tidy][NFC] Remove redudnant expr and qualType matchers from bugprone-sizeof...
Nathan James [Sat, 1 May 2021 07:53:29 +0000 (08:53 +0100)]
[clang-tidy][NFC] Remove redudnant expr and qualType matchers from bugprone-sizeof-expression.

13 days ago[libcxx] [test] Skip alloc counter checks for operations within the libc++ DLL
Martin Storsjö [Fri, 26 Feb 2021 14:34:29 +0000 (16:34 +0200)]
[libcxx] [test] Skip alloc counter checks for operations within the libc++ DLL

If libc++ is built as a DLL, calls to operator new within the DLL aren't
overridden if a user provides their own operator in calling code.
Therefore, the alloc counter doesn't pick up on allocations done within
std::string, so skip that check if running on windows. (Technically,
we could keep the checks if running on windows when not built as a DLL,
but trying to keep the conditionals simple.)

Differential Revision: https://reviews.llvm.org/D100219

13 days agoRevert "Re-reapply "[DebugInfo] Use variadic debug values to salvage BinOps and GEP...
Nathan Chancellor [Sat, 1 May 2021 03:23:21 +0000 (20:23 -0700)]
Revert "Re-reapply "[DebugInfo] Use variadic debug values to salvage BinOps and GEP instrs with non-const operands""

This reverts commit 791930d74087b8ae8901172861a0fd21a211e436, as per
https://llvm.org/docs/DeveloperPolicy.html#patch-reversion-policy.

I observed breakage with the Linux kernel, as reported at
https://reviews.llvm.org/D91722#2724321

Fixes exist at
https://reviews.llvm.org/D101523
https://reviews.llvm.org/D101540

but they have not landed so to unbreak the tree for the weekend, revert
this commit.

Commit b11e4c990771 ("Revert "[DebugInfo] Drop DBG_VALUE_LISTs with an
excessive number of debug operands"") only reverted one follow-up fix,
not the original patch that broke the kernel.

e

13 days ago[libc++] [LIBCXX-DEBUG-FIXME] <span>, like <string_view>, has no use for debug iterators.
Arthur O'Dwyer [Wed, 21 Apr 2021 02:08:00 +0000 (22:08 -0400)]
[libc++] [LIBCXX-DEBUG-FIXME] <span>, like <string_view>, has no use for debug iterators.

A span has no idea what container (if any) "owns" its iterators, nor
under what circumstances they might become invalidated.

However, continue to use `__wrap_iter<T*>` instead of raw `T*` outside
of debug mode, because we've been shipping `std::span` since Clang 7
and ldionne doesn't want to break ABI. (Namely, the mangling of functions
taking `span::iterator` as a parameter.) Permit using raw `T*` there,
but only under an ABI macro: `_LIBCPP_ABI_SPAN_POINTER_ITERATORS`.

Differential Revision: https://reviews.llvm.org/D101003

13 days ago[mlir][sparse] sparse tensor type encoding migration (new home, new builders)
Aart Bik [Sat, 1 May 2021 01:07:28 +0000 (18:07 -0700)]
[mlir][sparse] sparse tensor type encoding migration (new home, new builders)

(1) migrates the encoding from TensorDialect into the new SparseTensorDialect
(2) replaces dictionary-based storage and builders with struct-like data

Reviewed By: mehdi_amini

Differential Revision: https://reviews.llvm.org/D101669

13 days ago[clang][driver][darwin] use the deployment target version as the SDK version
Alex Lorenz [Sat, 1 May 2021 01:50:07 +0000 (18:50 -0700)]
[clang][driver][darwin] use the deployment target version as the SDK version
when passing -platform_version to the linker

The use of a valid SDK version is preferred over an empty SDK version
(0.0.0) as the system's runtime might expect the linked binary to contain
a valid SDK version in order for the binary to work correctly

rdar://66795188

13 days ago[PowerPC] Add floating point overloads for vec_sldw
Nemanja Ivanovic [Sat, 1 May 2021 01:29:03 +0000 (20:29 -0500)]
[PowerPC] Add floating point overloads for vec_sldw

These are added for compatibility with XLC.

13 days ago[PowerPC] Add missing requirement to test case
Nemanja Ivanovic [Sat, 1 May 2021 00:34:56 +0000 (19:34 -0500)]
[PowerPC] Add missing requirement to test case

Commit 70c433a184a54819835e54c62c3e6891e7069861 added this
test case that has -stop-before that mentions a pass that is
only added for non-release builds. Add the requirement for asserts.

13 days agoCorrect tiny misspelling (readlef -> readelf).
Kevin Athey [Thu, 29 Apr 2021 16:58:19 +0000 (09:58 -0700)]
Correct tiny misspelling (readlef -> readelf).
Getting my feet wet here as a new committer.

Correct misspelling in check-depends.pl.

Reviewed By: vitalybuka

Differential Revision: https://reviews.llvm.org/D101552

13 days ago[ELF] Simplify the condition adding .got header
Fangrui Song [Sat, 1 May 2021 00:19:45 +0000 (17:19 -0700)]
[ELF] Simplify the condition adding .got header

Adopt my suggestion in https://reviews.llvm.org/D91426#2653926 ,
generalizing the ppc64 specific code.

GNU ld and glibc ld.so has a contract about the first few entries of .got .
There are somewhat complex conditions when the header is needed. This patch
switches to a simpler approach: add a header unconditionally if
_GLOBAL_OFFSET_TABLE_ is used or the number of entries is more than just the
header.

13 days ago[PowerPC] Provide fastmath sqrt and div functions in altivec.h
Nemanja Ivanovic [Fri, 30 Apr 2021 23:54:44 +0000 (18:54 -0500)]
[PowerPC] Provide fastmath sqrt and div functions in altivec.h

This adds the long overdue implementations of these functions
that have been part of the ABI document and are now part of
the "Power Vector Intrinsic Programming Reference" (PVIPR).

The approach is to add new builtins and to emit code with
the fast flag regardless of whether fastmath was specified
on the command line.

Differential revision: https://reviews.llvm.org/D101209

13 days ago[gn build] Port 02c5ba867987
LLVM GN Syncbot [Sat, 1 May 2021 00:09:37 +0000 (00:09 +0000)]
[gn build] Port 02c5ba867987

13 days ago[libc++] s/begin.h/access.h/ in comments. NFCI.
Arthur O'Dwyer [Sat, 1 May 2021 00:07:00 +0000 (20:07 -0400)]
[libc++] s/begin.h/access.h/ in comments. NFCI.

13 days agoRevert "[VP,Integer,#2] ExpandVectorPredication pass"
Adrian Prantl [Fri, 30 Apr 2021 23:28:44 +0000 (16:28 -0700)]
Revert "[VP,Integer,#2] ExpandVectorPredication pass"

This reverts commit 43bc584dc05e24c6d44ece8e07d4bff585adaf6d.

The commit broke the -DLLVM_ENABLE_MODULES=1 builds.

http://green.lab.llvm.org/green/view/LLDB/job/lldb-cmake/31603/consoleFull#2136199809a1ca8a51-895e-46c6-af87-ce24fa4cd561

13 days agoRevert "[DebugInfo] Drop DBG_VALUE_LISTs with an excessive number of debug operands"
Nick Desaulniers [Fri, 30 Apr 2021 23:35:41 +0000 (16:35 -0700)]
Revert "[DebugInfo] Drop DBG_VALUE_LISTs with an excessive number of debug operands"

This reverts commit b623df3c93983c4512aa54f2c706716bdf865a90, as per
https://llvm.org/docs/DeveloperPolicy.html#patch-reversion-policy.

Breakages observed downstream reported in:
https://reviews.llvm.org/D91722#2724321

Fixes exist in:
https://reviews.llvm.org/D101523
https://reviews.llvm.org/D101540

but haven't landed yet going into the weekend.

13 days ago[dfsan] Fix origin tracking for fast8
George Balatsouras [Thu, 29 Apr 2021 22:54:52 +0000 (15:54 -0700)]
[dfsan] Fix origin tracking for fast8

The problem is the following. With fast8, we broke an important
invariant when loading shadows.  A wide shadow of 64 bits used to
correspond to 4 application bytes with fast16; so, generating a single
load was okay since those 4 application bytes would share a single
origin.  Now, using fast8, a wide shadow of 64 bits corresponds to 8
application bytes that should be backed by 2 origins (but we kept
generating just one).

Let’s say our wide shadow is 64-bit and consists of the following:
0xABCDEFGH. To check if we need the second origin value, we could do
the following (on the 64-bit wide shadow) case:

 - bitwise shift the wide shadow left by 32 bits (yielding 0xEFGH0000)
 - push the result along with the first origin load to the shadow/origin vectors
 - load the second 32-bit origin of the 64-bit wide shadow
 - push the wide shadow along with the second origin to the shadow/origin vectors.

The combineOrigins would then select the second origin if the wide
shadow is of the form 0xABCDE0000.  The tests illustrate how this
change affects the generated bitcode.

Reviewed By: stephan.yichao.zhao

Differential Revision: https://reviews.llvm.org/D101584

13 days ago[EarlyIfConversion] Avoid producing selects with identical operands
Jon Roelofs [Thu, 29 Apr 2021 15:40:41 +0000 (08:40 -0700)]
[EarlyIfConversion] Avoid producing selects with identical operands

This extends the early-ifcvt pass to avoid a few more cases where the resulting
select instructions would have matching operands.  Additionally, we now use TII
to determine "sameness" of the operands so that as TII gets smarter, so too
will ifcvt.

The attached test case was bugpoint-reduced down from CINT2000/252.eon in the
test-suite. See: https://clang.godbolt.org/z/WvnrcrGEn

Differential Revision: https://reviews.llvm.org/D101508

13 days ago[PowerPC] modernize test via update_llc_test_checks.py. NFC
Jon Roelofs [Fri, 30 Apr 2021 22:30:34 +0000 (15:30 -0700)]
[PowerPC] modernize test via update_llc_test_checks.py. NFC

13 days ago[libcxx][iterator][ranges] adds `input_iterator` and `input_range`
Christopher Di Bella [Sun, 11 Apr 2021 19:04:52 +0000 (19:04 +0000)]
[libcxx][iterator][ranges] adds `input_iterator` and `input_range`

Implements parts of:
    * P0896R4 The One Ranges Proposal`

Depends on D100269.

Differential Revision: https://reviews.llvm.org/D100271

13 days ago[X86] Promote 16-bit CTTZ_ZERO_UNDEF to 32-bit variant
Dávid Bolvanský [Fri, 30 Apr 2021 22:41:44 +0000 (00:41 +0200)]
[X86] Promote 16-bit CTTZ_ZERO_UNDEF to 32-bit variant

Related to PR50172.

Protects us against regressions after we will start doing cttz(zext(x)) -> zext(cttz(x)) transformation in the middle-end.

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D101662

13 days ago[libc++] [test] Add a debug-mode CI.
Arthur O'Dwyer [Tue, 20 Apr 2021 15:27:03 +0000 (11:27 -0400)]
[libc++] [test] Add a debug-mode CI.

To run llvm-lit manually from the command line:

    ./bin/llvm-lit -sv --param std=c++2b --param cxx_under_test=`pwd`/bin/clang \
        --param debug_level=1 ../libcxx/test/

Tests that currently fail with `debug_level=1` are marked `LIBCXX-DEBUG-FIXME`,
but my intent is to deal with all of them and leave no such annotations in
the codebase within the next couple weeks. (I have patches for all of them
in my local checkout.)

Differential Revision: https://reviews.llvm.org/D100866

13 days ago[libc++] Remove the line of stdout output from this generator. NFCI.
Arthur O'Dwyer [Fri, 30 Apr 2021 22:05:31 +0000 (18:05 -0400)]
[libc++] Remove the line of stdout output from this generator. NFCI.

This line was confusing some people: it's not supposed to indicate
any kind of problem with the script, and I can't see any way it could
even help with troubleshooting. So, just silence it.

13 days agoRevert "[EarlyIfConversion] Avoid producing selects with identical operands"
Jon Roelofs [Fri, 30 Apr 2021 21:53:53 +0000 (14:53 -0700)]
Revert "[EarlyIfConversion] Avoid producing selects with identical operands"

This reverts commit 3d27b5d28aabf8516aa1fefc78a6878b89a992f0.

Broke one of the PPC tests, which I didn't see because I usually build with
only the x86/AARch64 targets enabled... oops.

https://lab.llvm.org/buildbot#builders/109/builds/13834

llvm/test/CodeGen/PowerPC/expand-foldable-isel.ll

13 days ago[AArch64][GlobalISel] Use a single MachineIRBuilder for most of isel. NFC.
Amara Emerson [Fri, 30 Apr 2021 00:04:20 +0000 (17:04 -0700)]
[AArch64][GlobalISel] Use a single MachineIRBuilder for most of isel. NFC.

This is a long overdue cleanup. Not every use is eliminated, I stuck to uses
that were directly being called from select(), and not the render functions.

Differential Revision: https://reviews.llvm.org/D101590

13 days ago[EarlyIfConversion] Avoid producing selects with identical operands
Jon Roelofs [Thu, 29 Apr 2021 15:40:41 +0000 (08:40 -0700)]
[EarlyIfConversion] Avoid producing selects with identical operands

This extends the early-ifcvt pass to avoid a few more cases where the resulting
select instructions would have matching operands.  Additionally, we now use TII
to determine "sameness" of the operands so that as TII gets smarter, so too
will ifcvt.

The attached test case was bugpoint-reduced down from CINT2000/252.eon in the
test-suite. See: https://clang.godbolt.org/z/WvnrcrGEn

Differential Revision: https://reviews.llvm.org/D101508

13 days ago[llvm-readobj] Recognize N_THUMB_DEF as a symbol flag
Jez Ng [Fri, 30 Apr 2021 21:39:52 +0000 (17:39 -0400)]
[llvm-readobj] Recognize N_THUMB_DEF as a symbol flag

The right symbol flag mask is ~0x7, not ~0xf.

Also emit string names for the other flags (we were missing some).

Reviewed By: #lld-macho, gkm

Differential Revision: https://reviews.llvm.org/D101548

13 days ago[NewPM] Disable RelLookupTableConverter pass in LTO
Gulfem Savrun Yeniceri [Fri, 30 Apr 2021 20:32:56 +0000 (20:32 +0000)]
[NewPM] Disable RelLookupTableConverter pass in LTO

Relative look table converter pass caused an issue when full lto
is enabled (reported in https://reviews.llvm.org/D94355).
This patch disables that pass from full lto pre-link phase optimization
pipeline until the issue is fixed.

Differential Revision: https://reviews.llvm.org/D101664

13 days ago[AMDGPU] Remove set_gpr_idx instructions in conditional blocks
Jay Foad [Fri, 30 Apr 2021 13:53:47 +0000 (14:53 +0100)]
[AMDGPU] Remove set_gpr_idx instructions in conditional blocks

SIPreEmitPeephole did not try to remove redundant s_set_gpr_idx_*
instructions in blocks that end with a conditional branch instruction.
This seems like a simple oversight.

Differential Revision: https://reviews.llvm.org/D101629

13 days ago[ValueTracking] Slightly clean up programUndefinedIfUndefOrPoison() (NFC)
Nikita Popov [Fri, 30 Apr 2021 21:05:41 +0000 (23:05 +0200)]
[ValueTracking] Slightly clean up programUndefinedIfUndefOrPoison() (NFC)

Use contains() to check set membership, and adjust an oddly
structured loop.

13 days ago[ValueTracking] Limit scan when checking poison UB (PR50155)
Nikita Popov [Fri, 30 Apr 2021 20:38:40 +0000 (22:38 +0200)]
[ValueTracking] Limit scan when checking poison UB (PR50155)

The current code can scan an unlimited number of instructions,
if the containing basic block is very large. The test case from
PR50155 contains a basic block with approximately 100k instructions.

To avoid this, limit the number of instructions we inspect. At
the same time, drop the limit on the number of basic blocks, as
this will be implicitly limited by the number of instructions as
well.

13 days agoasan: fix a windows test
Dmitry Vyukov [Fri, 30 Apr 2021 20:47:43 +0000 (13:47 -0700)]
asan: fix a windows test

Before commit "sanitizer_common: introduce kInvalidTid/kMainTid"
asan invalid/unknown thread id was 0xffffff, so presumably we printed "T16777215".
Now it's -1, so we print T-1. Fix the test.
I think the new format is even better, "T-1" clearly looks like something special
rather than a random large number.

Reviewed By: vitalybuka

Differential Revision: https://reviews.llvm.org/D101634

13 days agoAdd support for llvm.assume intrinsic to the LoadStoreVectorizer pass
Justin Bogner [Fri, 30 Apr 2021 20:37:08 +0000 (13:37 -0700)]
Add support for llvm.assume intrinsic to the LoadStoreVectorizer pass

Patch by Viacheslav Nikolaev. Thanks!

13 days ago[tsan] Remove special SyncClock::kInvalidTid
Vitaly Buka [Fri, 30 Apr 2021 08:22:02 +0000 (01:22 -0700)]
[tsan] Remove special SyncClock::kInvalidTid

Followup for D101428.

Reviewed By: dvyukov

Differential Revision: https://reviews.llvm.org/D101604

13 days ago[OpenMP] Fix second debug name from map clause
Joel E. Denny [Fri, 30 Apr 2021 17:00:40 +0000 (13:00 -0400)]
[OpenMP] Fix second debug name from map clause

This patch fixes a bug from D89802.  For example, without it, Clang
generates x as the debug map name for both x and y in the following
example:

```
 #pragma omp target map(to: x, y)
 x = y = 1;
```

Reviewed By: jhuber6

Differential Revision: https://reviews.llvm.org/D101564

13 days ago[gn build] Port 2d28100bf2e4
LLVM GN Syncbot [Fri, 30 Apr 2021 20:17:55 +0000 (20:17 +0000)]
[gn build] Port 2d28100bf2e4

13 days ago[lld-macho] Parse & emit the N_ARM_THUMB_DEF symbol flag
Jez Ng [Fri, 30 Apr 2021 20:17:26 +0000 (16:17 -0400)]
[lld-macho] Parse & emit the N_ARM_THUMB_DEF symbol flag

Eventually we'll use this flag to properly handle bl/blx
opcodes.

Reviewed By: #lld-macho, gkm

Differential Revision: https://reviews.llvm.org/D101558

13 days ago[lld-macho] Initial scaffolding for ARM32 support
Jez Ng [Fri, 30 Apr 2021 20:17:25 +0000 (16:17 -0400)]
[lld-macho] Initial scaffolding for ARM32 support

This just parses the `-arch armv7` and emits the right header flags.
The rest will be slowly fleshed out in upcoming diffs.

Reviewed By: #lld-macho, gkm

Differential Revision: https://reviews.llvm.org/D101557

13 days ago[libc++] Fix constexpr-ness of std::tuple's constructor
Louis Dionne [Fri, 30 Apr 2021 19:52:26 +0000 (15:52 -0400)]
[libc++] Fix constexpr-ness of std::tuple's constructor

Mentioned in https://reviews.llvm.org/D96523.

13 days ago[TTI] NFC: Change getTypeLegalizationCost to return InstructionCost.
Daniil Fukalov [Thu, 29 Apr 2021 13:02:51 +0000 (16:02 +0300)]
[TTI] NFC: Change getTypeLegalizationCost to return InstructionCost.

This patch migrates the TTI cost interfaces to return an InstructionCost.

See this patch for the introduction of the type: https://reviews.llvm.org/D91174
See this thread for context: http://lists.llvm.org/pipermail/llvm-dev/2020-November/146408.html

Reviewed By: sdesmalen, kparzysz

Differential Revision: https://reviews.llvm.org/D101533

13 days ago[InstCombine] Added tests for PR50172, NFC
Dávid Bolvanský [Fri, 30 Apr 2021 19:26:26 +0000 (21:26 +0200)]
[InstCombine] Added tests for PR50172, NFC

13 days ago[MachineFunction] Make comment for TracksLiveness more clearer
Guozhi Wei [Fri, 30 Apr 2021 19:10:36 +0000 (12:10 -0700)]
[MachineFunction] Make comment for TracksLiveness more clearer

As discussed in https://lists.llvm.org/pipermail/llvm-dev/2021-April/150225.html,
the current comments for TracksLiveness property and isKill flag are confusing.
This patch makes the comments more clearer.

Differential Revision: https://reviews.llvm.org/D101500

13 days ago[llvm-reduce] Don't unset dso_local on implicitly dso_local GVs
Arthur Eubanks [Fri, 30 Apr 2021 18:54:42 +0000 (11:54 -0700)]
[llvm-reduce] Don't unset dso_local on implicitly dso_local GVs

This introduces a flag that aborts if we ever reduce to IR that fails
the verifier.

Reviewed By: swamulism, arichardson

Differential Revision: https://reviews.llvm.org/D101279

13 days ago[NFC][tsan] Fix cast after D101428
Vitaly Buka [Fri, 30 Apr 2021 18:29:13 +0000 (11:29 -0700)]
[NFC][tsan] Fix cast after D101428

13 days ago[llvm-reduce] Add flag to only run specific passes
Arthur Eubanks [Fri, 30 Apr 2021 18:48:03 +0000 (11:48 -0700)]
[llvm-reduce] Add flag to only run specific passes

Reviewed By: fhahn, hans

Differential Revision: https://reviews.llvm.org/D101278

13 days ago[libc++] [test] Recommit the unsetting of LC_COLLATE in the builder script.
Arthur O'Dwyer [Fri, 30 Apr 2021 18:43:33 +0000 (14:43 -0400)]
[libc++] [test] Recommit the unsetting of LC_COLLATE in the builder script.

This re-reverts one piece of 1b885573327d0f6b36f24ad23d243642f658750b,
reapplying one piece of D101437 (but not the "service"-queue piece of it).

It turns out that the behavior of `grep [^ -~]`, or even `grep [A-Z]`,
depends on locale, specifically `LC_COLLATE`. So we want to make sure
we're not in any weird locale, no matter what machine we're running on.
Yes, "en_US.UTF-8" counts as weird!
https://stackoverflow.com/questions/67320156/misbehavior-of-gnu-grep-when-grepping-for-ignores-spaces
https://stackoverflow.com/questions/6799872/how-to-make-grep-a-z-independent-of-locale

13 days agoRevert "AMDGPU/llvm-readobj: Add missing tests for note parsing/displaying"
Konstantin Zhuravlyov [Fri, 30 Apr 2021 18:45:07 +0000 (14:45 -0400)]
Revert "AMDGPU/llvm-readobj: Add missing tests for note parsing/displaying"

This reverts commit c9c4676a458b1ef99ffb67b43cfd87d6c27a448c.

Reason for revert: note-amd-valid-v3.s test fails if AMDGPU is not built.

13 days ago[libcxx] Use joined format for include flag on Windows
Petr Hosek [Thu, 29 Apr 2021 17:11:39 +0000 (10:11 -0700)]
[libcxx] Use joined format for include flag on Windows

Without this, CMake deduplicates the /I flag breaking the build. See
https://cmake.org/cmake/help/v3.13/command/target_compile_options.html
for more details on why this is needed.

Differential Revision: https://reviews.llvm.org/D101550

13 days ago[llvm-objdump] add -v alias for --version
Nick Desaulniers [Fri, 30 Apr 2021 18:26:30 +0000 (11:26 -0700)]
[llvm-objdump] add -v alias for --version

Used by the Linux kernel's CONFIG_X86_DECODER_SELFTEST.

Link: https://github.com/ClangBuiltLinux/linux/issues/1130
Reviewed By: MaskRay, jhenderson, rupprecht

Differential Revision: https://reviews.llvm.org/D101483

13 days ago[M68k] fix -Wdefaulted-function-deleted and -Woverloaded-virtual
Nick Desaulniers [Fri, 30 Apr 2021 18:10:23 +0000 (11:10 -0700)]
[M68k] fix -Wdefaulted-function-deleted and -Woverloaded-virtual

Fixes the following warnings observerd when building the experimental
m68k backend (-DLLVM_EXPERIMENTAL_TARGETS_TO_BUILD="M68k"):

../lib/Target/M68k/M68kMachineFunction.h:71:3: warning: explicitly
defaulted default constructor is implicitly deleted
[-Wdefaulted-function-deleted]
  M68kMachineFunctionInfo() = default;
  ^
../lib/Target/M68k/M68kMachineFunction.h:24:20: note: default
constructor of 'M68kMachineFunctionInfo' is implicitly deleted because
field 'MF' of reference type 'llvm::MachineFunction &' would not be
initialized
  MachineFunction &MF;
                   ^
In file included from ../lib/Target/M68k/M68kISelLowering.cpp:18:
In file included from ../lib/Target/M68k/M68kSubtarget.h:17:
../lib/Target/M68k/M68kFrameLowering.h:60:8: warning:
'llvm::M68kFrameLowering::emitCalleeSavedFrameMoves' hides overloaded
virtual functions [-Woverloaded-virtual]
  void emitCalleeSavedFrameMoves(MachineBasicBlock &MBB,
       ^
../include/llvm/CodeGen/TargetFrameLowering.h:215:3: note: hidden
overloaded virtual function
'llvm::TargetFrameLowering::emitCalleeSavedFrameMoves' declared here:
different number of parameters (2 vs 3)
  emitCalleeSavedFrameMoves(MachineBasicBlock &MBB,
  ^
../include/llvm/CodeGen/TargetFrameLowering.h:218:16: note: hidden
overloaded virtual function
'llvm::TargetFrameLowering::emitCalleeSavedFrameMoves' declared here:
different number of parameters (4 vs 3)
  virtual void emitCalleeSavedFrameMoves(MachineBasicBlock &MBB,
               ^

pr/50071

Reviewed By: myhsu

Differential Revision: https://reviews.llvm.org/D101588

13 days ago[ADT] Add llvm::remove_cvref and llvm::remove_cvref_t
Scott Linder [Fri, 30 Apr 2021 18:08:11 +0000 (18:08 +0000)]
[ADT] Add llvm::remove_cvref and llvm::remove_cvref_t

Reviewed By: dblaikie

Differential Revision: https://reviews.llvm.org/D100669

13 days ago[libc++] Revert the change that runs clang-format and generated-output in the service...
Louis Dionne [Fri, 30 Apr 2021 18:07:08 +0000 (14:07 -0400)]
[libc++] Revert the change that runs clang-format and generated-output in the service queue

This reverts commit 6712534ebc6f84f0b178a19bf17b7b2bd852f6eb.

Differential Revision: https://reviews.llvm.org/D101437

13 days agoSupport: Stop using F_{None,Text,Append} compatibility synonyms, NFC
Duncan P. N. Exon Smith [Thu, 29 Apr 2021 01:18:35 +0000 (18:18 -0700)]
Support: Stop using F_{None,Text,Append} compatibility synonyms, NFC

Stop using the compatibility spellings of `OF_{None,Text,Append}`
left behind by 1f67a3cba9b09636c56e2109d8a35ae96dc15782. A follow-up
will remove them.

Differential Revision: https://reviews.llvm.org/D101650

13 days agoAdd patterns to lower vector.multi_reduction into a sequence of vector.reduction
Ahmed Taei [Thu, 29 Apr 2021 21:05:23 +0000 (14:05 -0700)]
Add patterns to lower vector.multi_reduction into a sequence of vector.reduction

Three patterns are added to convert into vector.multi_reduction into a
sequence of vector.reduction as the following:

- Transpose the inputs so inner most dimensions are always reduction.
- Reduce rank of vector.multi_reduction into 2d with inner most
reduction dim (get the 2d canical form)
- 2D canonical form is converted into a sequence of vector.reduction.

There are two things we might worth in a follow up diff:

- An scf.for (maybe optionally) around vector.reduction instead of unrolling it.
- Breakdown the vector.reduction into a sequence of vector.reduction
(e.g tree-based reduction) instead of relying on how downstream dialects
handle it.
  Note: this will requires passing target-vector-length

Differential Revision: https://reviews.llvm.org/D101570

13 days ago[AArch64] Fix lowering for fshl/fshr with SVE types.
Eli Friedman [Thu, 29 Apr 2021 21:35:34 +0000 (14:35 -0700)]
[AArch64] Fix lowering for fshl/fshr with SVE types.

These operations don't exist natively, so just let the
target-independent code expand to plain shifts.

The generated sequences could probably be optimized a bit more, but
they seem good enough for now.

Differential Revision: https://reviews.llvm.org/D101574

13 days ago[OpenMP][CMake] Use in-project clang as CUDA->IR compiler.
Michael Kruse [Fri, 30 Apr 2021 17:38:55 +0000 (12:38 -0500)]
[OpenMP][CMake] Use in-project clang as CUDA->IR compiler.

If available, use the clang that is already built in the same project as
CUDA compiler unless another executable is explicitly defined. This also
ensures the generated deviceRTL IR will be consistent with the version
of Clang.

This patch is required to reliably test OpenMP offloading in a buildbot
without either a two-stage build (e.g. with LLVM_ENABLE_RUNTIMES) or a
separately installed clang on the worker that will eventually become
outdated.

Reviewed By: tianshilei1992

Differential Revision: https://reviews.llvm.org/D101265

13 days ago[gn build] Port c6f20d70a8c9
LLVM GN Syncbot [Fri, 30 Apr 2021 17:30:08 +0000 (17:30 +0000)]
[gn build] Port c6f20d70a8c9

13 days ago[ADT] Add STLForwardCompat.h and llvm::disjunction
Scott Linder [Fri, 30 Apr 2021 17:15:49 +0000 (17:15 +0000)]
[ADT] Add STLForwardCompat.h and llvm::disjunction

Move some types in STLExtras.h which are named and behave identically to
STL types from future standards into a dedicated header. This keeps them
organized (they are not "extras" in the same sense as most types in
STLExtras.h are) and fixes circular dependencies in future patches.

Reviewed By: dblaikie

Differential Revision: https://reviews.llvm.org/D100668

13 days ago[NFC] Refactor ExecuteAssembler in cc1as_main.cpp
Scott Linder [Fri, 30 Apr 2021 17:06:48 +0000 (17:06 +0000)]
[NFC] Refactor ExecuteAssembler in cc1as_main.cpp

Introduce an extra scope (another static function) to replace calls to
`unique_ptr::reset` with implicit destructors via RAII.

Reviewed By: MaskRay

Differential Revision: https://reviews.llvm.org/D101542

13 days ago[gn build] Port 7c17731596e9
LLVM GN Syncbot [Fri, 30 Apr 2021 17:00:36 +0000 (17:00 +0000)]
[gn build] Port 7c17731596e9

13 days ago[gn build] Port 5a3309f82576
LLVM GN Syncbot [Fri, 30 Apr 2021 17:00:35 +0000 (17:00 +0000)]
[gn build] Port 5a3309f82576

13 days ago[libcxx][ranges] adds `ranges::range`, `ranges::common_range`, and range aliases
Christopher Di Bella [Sun, 11 Apr 2021 17:40:30 +0000 (17:40 +0000)]
[libcxx][ranges] adds `ranges::range`, `ranges::common_range`, and range aliases

* `std::ranges::range`
* `std::ranges::sentinel_t`
* `std::ranges::range_difference_t`
* `std::ranges::range_value_t`
* `std::ranges::range_reference_t`
* `std::ranges::range_rvalue_reference_t`
* `std::ranges::common_range`

`range_size_t` depends on `sized_range` and will be added alongside it.

Implements parts of:
    * P0896R4 The One Ranges Proposal`

Depends on D100255.

Differential Revision: https://reviews.llvm.org/D100269

13 days ago[libcxx][ranges] adds `range` access CPOs
Christopher Di Bella [Sun, 11 Apr 2021 05:08:32 +0000 (05:08 +0000)]
[libcxx][ranges] adds `range` access CPOs

* `std::ranges::begin`
* `std::ranges::cbegin`
* `std::ranges::end`
* `std::ranges::cend`
* `std::ranges::iterator` (required for `end`)

Implements parts of:
    * P0896R4 The One Ranges Proposal`

Co-author: @zoecarver

Depends on D90999, D100160.

Differential Revision: https://reviews.llvm.org/D100255

13 days ago[SLP]Fix the crash on cost calculation if non-compatible vectors shuffled.
Alexey Bataev [Wed, 28 Apr 2021 14:02:33 +0000 (07:02 -0700)]
[SLP]Fix the crash on cost calculation if non-compatible vectors shuffled.

If the extracts from the non-power-2 vectors are recognized as shuffles,
need some extra checks to not crash cost calculations if trying to gext
the ecost for subvector extracts. In this case need to check carefully
that we do not exit out of bounds of the original vector, otherwise the
TTI's cost model will crash on assert.

Differential Revision: https://reviews.llvm.org/D101477

13 days ago[AArch64] Adds a pre-indexed paired Load/Store optimization for LDR-STR.
Stelios Ioannou [Fri, 30 Apr 2021 15:19:48 +0000 (16:19 +0100)]
[AArch64] Adds a pre-indexed paired Load/Store optimization for LDR-STR.

This patch merges STR<S,D,Q,W,X>pre-STR<S,D,Q,W,X>ui and
LDR<S,D,Q,W,X>pre-LDR<S,D,Q,W,X>ui instruction pairs into a single
STP<S,D,Q,W,X>pre and LDP<S,D,Q,W,X>pre instruction, respectively.
For each pair, there is a MIR test that verifies this optimization.

Differential Revision: https://reviews.llvm.org/D99272

Change-Id: Ie97a20c8c716c08492fe229c22e14e3c98ef08b7

13 days ago[clang] Update comments on another libstdc++ HACK
Nathan Sidwell [Thu, 29 Apr 2021 13:20:54 +0000 (06:20 -0700)]
[clang] Update comments on another libstdc++ HACK

Document relevant gcc versions and dates.

Differential Revision: https://reviews.llvm.org/D101530

13 days ago[flang] Allow KIND type parameters to be used as LEN parameters of components
Peter Steinfeld [Wed, 28 Apr 2021 19:57:50 +0000 (12:57 -0700)]
[flang] Allow KIND type parameters to be used as LEN parameters of components

When producing the runtime type information for a component of a derived type
that had a LEN type parameter, we were not allowing a KIND parameter of the
derived type.  This was causing one of the NAG correctness tests to fail
(.../hibiya/d5.f90).

I added a test to our own test suite to check for this.

Also, I fixed a typo in .../module/__fortran_type_info.f90.

I allowed KIND type parameters to be used for the declarations of components
that use LEN parameters by constant folding the value of the LEN parameter.  To
make the constant folding work, I had to put the semantics::DerivedTypeSpec of
the associated derived type into the folding context.  To get this
semantics::DerivedTypeSpec, I changed the value of the semantics::Scope object
that was passed to DescribeComponent() to be the derived type scope rather than
the containing non-derived type scope.

This scope change, in turn, caused differences in the symbol table output that
is checked in typeinfo01.f90.  Most of these differences were in the order that
the symbols appeared in the dump.  But one of them changed one of the values
from "CHARACTER(2_8,1)" to "CHARACTER(1_8,1)".  I'm not sure if these changes
are significant.  Please verify that the results of this test are still valid.

Also, I wonder if there are other situations in this code where we should be
folding constants.  For example, what if the field of a component has a
component whose type is a PDT with a LEN type parameter, and the component's
declaration depends on the KIND type parameter of the current PDT.  Here's an
example:

  type string(stringkind)
    integer,kind :: stringkind
    character(stringkind) :: value
  end type string

  type outer(kindparam)
    integer,kind :: kindparam
    type(string(kindparam)) :: field
  end type outer

I don't understand the code or what it's trying to accomplish well enough to
figure out if such cases are correctly handled by my new code.

Differential Revision: https://reviews.llvm.org/D101482

13 days ago[analyzer] Fix assertion in SVals.h
Vince Bridgers [Fri, 30 Apr 2021 14:32:35 +0000 (09:32 -0500)]
[analyzer] Fix assertion in SVals.h

Fix assertion in SVals.h apparently caused by
https://reviews.llvm.org/D89055.

clang:clang/include/clang/StaticAnalyzer/Core/PathSensitive/SVals.h:596:
clang::ento::loc::MemRegionVal::MemRegionVal(const clang::ento::MemRegion *):
  Assertion `r' failed.

Backtrace:
...
     clang/include/clang/StaticAnalyzer/Core/PathSensitive/SVals.h:597:3
     clang::QualType, clang::QualType)
     clang/lib/StaticAnalyzer/Core/SValBuilder.cpp:773:18
     clang::QualType, clang::QualType)
     clang/lib/StaticAnalyzer/Core/SValBuilder.cpp:612:12
     clang::QualType) clang/lib/StaticAnalyzer/Core/SValBuilder.cpp:587:12
     namespace)::RegionBindingsRef const&, clang::ento::Loc, clang::QualType)
     clang/lib/StaticAnalyzer/Core/RegionStore.cpp:1510:24
...

Reviewed By: ASDenysPetrov

Differential Revision: https://reviews.llvm.org/D101635

13 days ago[AArch64][SVE] Remove unused function missed from D101302
Bradley Smith [Fri, 23 Apr 2021 15:34:26 +0000 (16:34 +0100)]
[AArch64][SVE] Remove unused function missed from D101302

The functionality in SVEIntrinsicOpts::isReinterpretToSVBool was moved in
D101302, however the original now unused function was not removed (NFC).

Differential Revision: https://reviews.llvm.org/D101642

13 days ago[lldb] Change DumpDataExtractorTest function names to lldb style (NFC)
David Spickett [Fri, 30 Apr 2021 15:52:21 +0000 (16:52 +0100)]
[lldb] Change DumpDataExtractorTest function names to lldb style (NFC)

13 days agoRevert "[CodeGen][ARM] Implement atomicrmw as pseudo operations at -O0"
Tomas Matheson [Fri, 30 Apr 2021 15:53:14 +0000 (16:53 +0100)]
Revert "[CodeGen][ARM] Implement atomicrmw as pseudo operations at -O0"

This reverts commit 3338290c187b254ad071f4b9cbf2ddb2623cefc0.

Broke expensive checks on debian.

13 days ago[lldb] DumpDataExtractor tests for item byte size errors
David Spickett [Fri, 30 Apr 2021 14:16:57 +0000 (15:16 +0100)]
[lldb] DumpDataExtractor tests for item byte size errors

Reviewed By: teemperor

Differential Revision: https://reviews.llvm.org/D101631

13 days ago[CodeGen][ARM] Implement atomicrmw as pseudo operations at -O0
Tomas Matheson [Wed, 31 Mar 2021 16:45:45 +0000 (17:45 +0100)]
[CodeGen][ARM] Implement atomicrmw as pseudo operations at -O0

atomicrmw instructions are expanded by AtomicExpandPass before register allocation
into cmpxchg loops. Register allocation can insert spills between the exclusive loads
and stores, which invalidates the exclusive monitor and can lead to infinite loops.

To avoid this, reimplement atomicrmw operations as pseudo-instructions and expand them
after register allocation.

Floating point legalisation:
f16 ATOMIC_LOAD_FADD(*f16, f16) is legalised to
f32 ATOMIC_LOAD_FADD(*i16, f32) and then eventually
f32 ATOMIC_LOAD_FADD_16(*i16, f32)

Differential Revision: https://reviews.llvm.org/D101164