update for HEAD-2003091401
[reactos.git] / hal / halx86 / dma.c
1 /* $Id$
2  *
3  * COPYRIGHT:       See COPYING in the top level directory
4  * PROJECT:         ReactOS kernel
5  * FILE:            ntoskrnl/hal/x86/dma.c
6  * PURPOSE:         DMA functions
7  * PROGRAMMERS:     David Welch (welch@mcmail.com)
8  * UPDATE HISTORY:
9  *                  Created 22/05/98
10  */
11
12 /* INCLUDES *****************************************************************/
13
14 #include <ddk/ntddk.h>
15
16 #include <internal/debug.h>
17 #include <hal.h>
18
19 ADAPTER_OBJECT IsaSlaveAdapterObjects[] = {
20   { Isa, FALSE, 0, (PVOID)0x87, (PVOID)0x1, (PVOID)0x0, 0, NULL },
21   { Isa, FALSE, 1, (PVOID)0x83, (PVOID)0x3, (PVOID)0x2, 0, NULL },
22   { Isa, FALSE, 2, (PVOID)0x81, (PVOID)0x5, (PVOID)0x4, 0, NULL },
23   { Isa, FALSE, 3, (PVOID)0x82, (PVOID)0x7, (PVOID)0x6, 0, NULL } };
24
25 ADAPTER_OBJECT PciBusMasterAdapterObjects[] = {
26   { PCIBus, TRUE, 0, (PVOID)0, (PVOID)0, (PVOID)0x0, 0, NULL } };
27
28
29 /* FUNCTIONS *****************************************************************/
30
31 PVOID STDCALL
32 HalAllocateCommonBuffer (PADAPTER_OBJECT    AdapterObject,
33                          ULONG              Length,
34                          PPHYSICAL_ADDRESS  LogicalAddress,
35                          BOOLEAN            CacheEnabled)
36 /*
37  * FUNCTION: Allocates memory that is visible to both the processor(s) and
38  * a dma device
39  * ARGUMENTS: 
40  *         AdapterObject = Adapter object representing the bus master or
41  *                         system dma controller
42  *         Length = Number of bytes to allocate
43  *         LogicalAddress = Logical address the driver can use to access the
44  *                          buffer 
45  *         CacheEnabled = Specifies if the memory can be cached
46  * RETURNS: The base virtual address of the memory allocated
47  *          NULL on failure
48  * NOTES:
49  *      CacheEnabled is ignored - it's all cache-disabled (like in NT)
50  */
51 {
52   PHYSICAL_ADDRESS HighestAddress;
53   PVOID BaseAddress;
54
55   HighestAddress.u.HighPart = 0;
56   if (AdapterObject->InterfaceType == Isa ||
57       (AdapterObject->InterfaceType == MicroChannel && AdapterObject->Master == FALSE))
58     {
59       HighestAddress.u.LowPart = 0x00FFFFFF; /* 24Bit: 16MB address range */
60     }
61   else
62     {
63       HighestAddress.u.LowPart = 0xFFFFFFFF; /* 32Bit: 4GB address range */
64     }
65
66   BaseAddress = MmAllocateContiguousMemory(Length, HighestAddress);
67   if (!BaseAddress)
68     return 0;
69
70   *LogicalAddress = MmGetPhysicalAddress(BaseAddress);
71
72   return BaseAddress;
73 }
74
75 BOOLEAN STDCALL
76 HalFlushCommonBuffer (ULONG     Unknown1,
77                       ULONG     Unknown2,
78                       ULONG     Unknown3,
79                       ULONG     Unknown4,
80                       ULONG     Unknown5,
81                       ULONG     Unknown6,
82                       ULONG     Unknown7,
83                       ULONG     Unknown8)
84 {
85    return TRUE;
86 }
87
88 VOID STDCALL
89 HalFreeCommonBuffer (PADAPTER_OBJECT            AdapterObject,
90                      ULONG                      Length,
91                      PHYSICAL_ADDRESS   LogicalAddress,
92                      PVOID                      VirtualAddress,
93                      BOOLEAN                    CacheEnabled)
94 {
95    MmFreeContiguousMemory(VirtualAddress);
96 }
97
98 PADAPTER_OBJECT STDCALL
99 HalGetAdapter (PDEVICE_DESCRIPTION      DeviceDescription,
100                PULONG                   NumberOfMapRegisters)
101 /*
102  * FUNCTION: Returns a pointer to an adapter object for the DMA device 
103  * defined in the device description structure
104  * ARGUMENTS:
105  *        DeviceDescription = Structure describing the attributes of the device
106  *        NumberOfMapRegisters (OUT) = Returns the maximum number of map
107  *                                     registers the device driver can
108  *                                     allocate for DMA transfer operations
109  * RETURNS: The allocated adapter object on success
110  *          NULL on failure
111  * TODO:
112  *    Figure out what to do with the commented-out cases
113  */
114 {
115   /* Validate parameters in device description, and return a pointer to
116      the adapter object for the requested dma channel */
117   if( DeviceDescription->Version != DEVICE_DESCRIPTION_VERSION )
118     return NULL;
119
120   if (DeviceDescription->InterfaceType == PCIBus)
121     {
122       if (DeviceDescription->Master == FALSE)
123         return NULL;
124
125       return &PciBusMasterAdapterObjects[0];
126     }
127
128   /*
129   if( DeviceDescription->Master )
130     return NULL;
131   if( DeviceDescription->ScatterGather )
132     return NULL;
133   if( DeviceDescription->AutoInitialize )
134     return NULL;
135   if( DeviceDescription->Dma32BitAddresses )
136     return NULL;
137   if( DeviceDescription->InterfaceType != Isa )
138      return NULL;
139      */
140   /*  if( DeviceDescription->DmaWidth != Width8Bits )
141       return NULL;*/
142   *NumberOfMapRegisters = 0x10;
143   IsaSlaveAdapterObjects[DeviceDescription->DmaChannel].Buffer = 0;
144   return &IsaSlaveAdapterObjects[DeviceDescription->DmaChannel];
145 }
146
147 ULONG STDCALL
148 HalReadDmaCounter (PADAPTER_OBJECT      AdapterObject)
149 {
150    UNIMPLEMENTED;
151 }
152
153 /* EOF */