#define IDE_SR_DRQ 0x08
#define IDE_SR_ERR 0x01
#define IDE_REG_COMMAND 0x0007
+
+/* IDE/ATA commands */
#define IDE_CMD_RESET 0x08
#define IDE_CMD_READ 0x20
#define IDE_CMD_READ_RETRY 0x21
#define IDE_CMD_WRITE 0x30
#define IDE_CMD_WRITE_RETRY 0x31
+#define IDE_CMD_PACKET 0xA0
+#define IDE_CMD_READ_MULTIPLE 0xC4
+#define IDE_CMD_WRITE_MULTIPLE 0xC5
+#define IDE_CMD_FLUSH_CACHE 0xE7
+#define IDE_CMD_FLUSH_CACHE_EXT 0xEA
#define IDE_CMD_IDENT_ATA_DRV 0xEC
#define IDE_CMD_IDENT_ATAPI_DRV 0xA1
+
//
// Access macros for command registers
// Each macro takes an address of the command port block, and data
#define IDEWriteBlock(Address, Buffer, Count) \
(ScsiPortWritePortBufferUshort((PUSHORT)((Address) + IDE_REG_DATA_PORT), (PUSHORT)(Buffer), (Count) / 2))
+#define IDEReadBlock32(Address, Buffer, Count) \
+ (ScsiPortReadPortBufferUlong((PULONG)((Address) + IDE_REG_DATA_PORT), (PULONG)(Buffer), (Count) / 4))
+#define IDEWriteBlock32(Address, Buffer, Count) \
+ (ScsiPortWritePortBufferUlong((PULONG)((Address) + IDE_REG_DATA_PORT), (PULONG)(Buffer), (Count) / 4))
+
+#define IDEReadWord(Address) \
+ (ScsiPortReadPortUshort((PUSHORT)((Address) + IDE_REG_DATA_PORT)))
+
//
// Access macros for control registers
// Each macro takes an address of the control port blank and data
char FirmwareRev[8]; /*23*/
char ModelNumber[40]; /*27*/
WORD RWMultImplemented; /*47*/
- WORD Reserved48; /*48*/
+ WORD DWordIo; /*48*/
WORD Capabilities; /*49*/
#define IDE_DRID_STBY_SUPPORTED 0x2000
#define IDE_DRID_IORDY_SUPPORTED 0x0800
WORD TMSectorsPerTrk; /*56*/
WORD TMCapacityLo; /*57*/
WORD TMCapacityHi; /*58*/
- WORD Reserved59; /*59*/
+ WORD RWMultCurrent; /*59*/
WORD TMSectorCountLo; /*60*/
WORD TMSectorCountHi; /*61*/
WORD Reserved62[193]; /*62*/
WORD Checksum; /*255*/
} IDE_DRIVE_IDENTIFY, *PIDE_DRIVE_IDENTIFY;
-
#ifdef __cplusplus
}
#endif